]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
i386: Add LEGACY_INDEX_REG register class.
authorUros Bizjak <ubizjak@gmail.com>
Sun, 5 Nov 2023 19:53:02 +0000 (20:53 +0100)
committerUros Bizjak <ubizjak@gmail.com>
Sun, 5 Nov 2023 19:55:42 +0000 (20:55 +0100)
Also rename LEGACY_REGS to LEGACY_GENERAL_REGS.

gcc/ChangeLog:

* config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
* config/i386/constraints.md ("R"): Update for rename.

gcc/config/i386/constraints.md
gcc/config/i386/i386.h

index dc91bd94b27d3cd801cfe0ed0377a3669b6fbe14..f6275740eb22ad26453bdec34cf988f9b20f8d4e 100644 (file)
@@ -23,7 +23,7 @@
 
 ;; Integer register constraints.
 ;; It is not necessary to define 'r' here.
-(define_register_constraint "R" "LEGACY_REGS"
+(define_register_constraint "R" "LEGACY_GENERAL_REGS"
  "Legacy register---the eight integer registers available on all
   i386 processors (@code{a}, @code{b}, @code{c}, @code{d},
   @code{si}, @code{di}, @code{bp}, @code{sp}).")
index a56367a947b3769d55070e001d3f6aa6d24d7dfd..037074758ea048b8ae3572d5daff131d73edcca5 100644 (file)
@@ -1307,12 +1307,16 @@ enum reg_class
   Q_REGS,                      /* %eax %ebx %ecx %edx */
   NON_Q_REGS,                  /* %esi %edi %ebp %esp */
   TLS_GOTBASE_REGS,            /* %ebx %ecx %edx %esi %edi %ebp */
-  INDEX_REGS,                  /* %eax %ebx %ecx %edx %esi %edi %ebp */
-  LEGACY_REGS,                 /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
+  LEGACY_GENERAL_REGS,         /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
+  LEGACY_INDEX_REGS,           /* %eax %ebx %ecx %edx %esi %edi %ebp */
   GENERAL_REGS,                        /* %eax %ebx %ecx %edx %esi %edi %ebp %esp
                                   %r8 %r9 %r10 %r11 %r12 %r13 %r14 %r15
                                   %r16 %r17 %r18 %r19 %r20 %r21 %r22 %r23
                                   %r24 %r25 %r26 %r27 %r28 %r29 %r30 %r31 */
+  INDEX_REGS,                  /* %eax %ebx %ecx %edx %esi %edi %ebp
+                                  %r8 %r9 %r10 %r11 %r12 %r13 %r14 %r15
+                                  %r16 %r17 %r18 %r19 %r20 %r21 %r22 %r23
+                                  %r24 %r25 %r26 %r27 %r28 %r29 %r30 %r31 */
   GENERAL_GPR16,               /* %eax %ebx %ecx %edx %esi %edi %ebp %esp
                                   %r8 %r9 %r10 %r11 %r12 %r13 %r14 %r15 */
   INDEX_GPR16,                 /* %eax %ebx %ecx %edx %esi %edi %ebp
@@ -1376,9 +1380,10 @@ enum reg_class
    "CLOBBERED_REGS",                   \
    "Q_REGS", "NON_Q_REGS",             \
    "TLS_GOTBASE_REGS",                 \
-   "INDEX_REGS",                       \
-   "LEGACY_REGS",                      \
+   "LEGACY_GENERAL_REGS",              \
+   "LEGACY_INDEX_REGS",                        \
    "GENERAL_REGS",                     \
+   "INDEX_REGS",                       \
    "GENERAL_GPR16",                    \
    "INDEX_GPR16",                      \
    "FP_TOP_REG", "FP_SECOND_REG",      \
@@ -1416,11 +1421,12 @@ enum reg_class
       { 0x0f,        0x0,   0x0 },     /* Q_REGS */                    \
    { 0x900f0,        0x0,   0x0 },     /* NON_Q_REGS */                \
       { 0x7e,      0xff0,   0x0 },     /* TLS_GOTBASE_REGS */          \
-      { 0x7f,      0xff0,   0xffff000 },       /* INDEX_REGS */                \
-   { 0x900ff,        0x0,   0x0 },     /* LEGACY_REGS */               \
-   { 0x900ff,      0xff0,   0xffff000 },       /* GENERAL_REGS */              \
+   { 0x900ff,        0x0,   0x0 },     /* LEGACY_GENERAL_REGS */       \
+      { 0x7f,        0x0,   0x0 },     /* LEGACY_INDEX_REGS */         \
+   { 0x900ff,      0xff0,   0xffff000 }, /* GENERAL_REGS */            \
+      { 0x7f,      0xff0,   0xffff000 }, /* INDEX_REGS */              \
    { 0x900ff,      0xff0,   0x0 },     /* GENERAL_GPR16 */             \
-   { 0x0007f,      0xff0,   0x0 },     /* INDEX_GPR16 */               \
+      { 0x7f,      0xff0,   0x0 },     /* INDEX_GPR16 */               \
      { 0x100,        0x0,   0x0 },     /* FP_TOP_REG */                \
      { 0x200,        0x0,   0x0 },     /* FP_SECOND_REG */             \
     { 0xff00,        0x0,   0x0 },     /* FLOAT_REGS */                \
@@ -1430,13 +1436,13 @@ enum reg_class
  { 0xff00000, 0xfffff000,   0xf },     /* ALL_SSE_REGS */              \
 { 0xf0000000,        0xf,   0x0 },     /* MMX_REGS */                  \
  { 0xff0ff00, 0xfffff000,   0xf },     /* FLOAT_SSE_REGS */            \
- {   0x9ffff,      0xff0,   0xffff000 },       /* FLOAT_INT_REGS */            \
- { 0xff900ff, 0xfffffff0,   0xffff00f },       /* INT_SSE_REGS */              \
- { 0xff9ffff, 0xfffffff0,   0xffff00f },       /* FLOAT_INT_SSE_REGS */        \
-       { 0x0,        0x0, 0xfe0 },     /* MASK_REGS */                 \
-       { 0x0,        0x0, 0xff0 },     /* ALL_MASK_REGS */             \
-   { 0x900ff,      0xff0, 0xffffff0 }, /* INT_MASK_REGS */     \
-{ 0xffffffff, 0xffffffff, 0xfffffff }  /* ALL_REGS  */                 \
+ {   0x9ffff,      0xff0,   0xffff000 }, /* FLOAT_INT_REGS */          \
+ { 0xff900ff, 0xfffffff0,   0xffff00f }, /* INT_SSE_REGS */            \
+ { 0xff9ffff, 0xfffffff0,   0xffff00f }, /* FLOAT_INT_SSE_REGS */      \
+       { 0x0,        0x0,   0xfe0 },   /* MASK_REGS */                 \
+       { 0x0,        0x0,   0xff0 },   /* ALL_MASK_REGS */             \
+   { 0x900ff,      0xff0,   0xffffff0 }, /* INT_MASK_REGS */           \
+{ 0xffffffff, 0xffffffff,   0xfffffff }         /* ALL_REGS  */                \
 }
 
 /* The same information, inverted: