]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
6.6-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 13 Jul 2025 14:52:44 +0000 (16:52 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 13 Jul 2025 14:52:44 +0000 (16:52 +0200)
added patches:
pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch

queue-6.6/pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch [new file with mode: 0644]
queue-6.6/series

diff --git a/queue-6.6/pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch b/queue-6.6/pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch
new file mode 100644 (file)
index 0000000..83271fa
--- /dev/null
@@ -0,0 +1,66 @@
+From 505b730ede7f5c4083ff212aa955155b5b92e574 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@baylibre.com>
+Date: Fri, 4 Jul 2025 19:27:27 +0200
+Subject: pwm: mediatek: Ensure to disable clocks in error path
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
+
+commit 505b730ede7f5c4083ff212aa955155b5b92e574 upstream.
+
+After enabling the clocks each error path must disable the clocks again.
+One of them failed to do so. Unify the error paths to use goto to make it
+harder for future changes to add a similar bug.
+
+Fixes: 7ca59947b5fc ("pwm: mediatek: Prevent divide-by-zero in pwm_mediatek_config()")
+Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
+Link: https://lore.kernel.org/r/20250704172728.626815-2-u.kleine-koenig@baylibre.com
+Cc: stable@vger.kernel.org
+[ukleinek: backported to 6.6.y]
+Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pwm/pwm-mediatek.c |   13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+--- a/drivers/pwm/pwm-mediatek.c
++++ b/drivers/pwm/pwm-mediatek.c
+@@ -133,8 +133,10 @@ static int pwm_mediatek_config(struct pw
+               return ret;
+       clk_rate = clk_get_rate(pc->clk_pwms[pwm->hwpwm]);
+-      if (!clk_rate)
+-              return -EINVAL;
++      if (!clk_rate) {
++              ret = -EINVAL;
++              goto out;
++      }
+       /* Make sure we use the bus clock and not the 26MHz clock */
+       if (pc->soc->has_ck_26m_sel)
+@@ -153,9 +155,9 @@ static int pwm_mediatek_config(struct pw
+       }
+       if (clkdiv > PWM_CLK_DIV_MAX) {
+-              pwm_mediatek_clk_disable(chip, pwm);
+               dev_err(chip->dev, "period of %d ns not supported\n", period_ns);
+-              return -EINVAL;
++              ret = -EINVAL;
++              goto out;
+       }
+       if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) {
+@@ -172,9 +174,10 @@ static int pwm_mediatek_config(struct pw
+       pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period);
+       pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);
++out:
+       pwm_mediatek_clk_disable(chip, pwm);
+-      return 0;
++      return ret;
+ }
+ static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)
index b729295e3ab6ae7b585d1652a4dbe4a64bd97101..544e8467470f990d15de1e0621d5bc2e86e82a9f 100644 (file)
@@ -56,3 +56,4 @@ scripts-gdb-fix-interrupts-display-after-mcp-on-x86.patch
 scripts-gdb-de-reference-per-cpu-mce-interrupts.patch
 scripts-gdb-fix-interrupts.py-after-maple-tree-conversion.patch
 mm-vmalloc-leave-lazy-mmu-mode-on-pte-mapping-error.patch
+pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch