]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
cpufreq/amd-pstate: Stop caching EPP
authorMario Limonciello <mario.limonciello@amd.com>
Sun, 19 Jan 2025 13:05:43 +0000 (07:05 -0600)
committerMario Limonciello <mario.limonciello@amd.com>
Thu, 6 Mar 2025 19:01:26 +0000 (13:01 -0600)
EPP values are cached in the cpudata structure per CPU. This is needless
though because they are also cached in the CPPC request variable.

Drop the separate cache for EPP values and always reference the CPPC
request variable when needed.

Reviewed-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
drivers/cpufreq/amd-pstate.c
drivers/cpufreq/amd-pstate.h

index 7802f37bde027b046a52663b171258d882c2a3d5..8c5f4449adfa5a85b3739e7e2f89e168c90ed9a4 100644 (file)
@@ -268,8 +268,6 @@ static int msr_update_perf(struct cpufreq_policy *policy, u8 min_perf,
        }
 
        WRITE_ONCE(cpudata->cppc_req_cached, value);
-       if (epp != cpudata->epp_cached)
-               WRITE_ONCE(cpudata->epp_cached, epp);
 
        return 0;
 }
@@ -318,7 +316,6 @@ static int msr_set_epp(struct cpufreq_policy *policy, u8 epp)
        }
 
        /* update both so that msr_update_perf() can effectively check */
-       WRITE_ONCE(cpudata->epp_cached, epp);
        WRITE_ONCE(cpudata->cppc_req_cached, value);
 
        return ret;
@@ -335,9 +332,12 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
 {
        struct amd_cpudata *cpudata = policy->driver_data;
        struct cppc_perf_ctrls perf_ctrls;
+       u8 epp_cached;
        u64 value;
        int ret;
 
+
+       epp_cached = FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached);
        if (trace_amd_pstate_epp_perf_enabled()) {
                union perf_cached perf = cpudata->perf;
 
@@ -348,10 +348,10 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
                                          FIELD_GET(AMD_CPPC_MAX_PERF_MASK,
                                                    cpudata->cppc_req_cached),
                                          policy->boost_enabled,
-                                         epp != cpudata->epp_cached);
+                                         epp != epp_cached);
        }
 
-       if (epp == cpudata->epp_cached)
+       if (epp == epp_cached)
                return 0;
 
        perf_ctrls.energy_perf = epp;
@@ -360,7 +360,6 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
                pr_debug("failed to set energy perf value (%d)\n", ret);
                return ret;
        }
-       WRITE_ONCE(cpudata->epp_cached, epp);
 
        value = READ_ONCE(cpudata->cppc_req_cached);
        value &= ~AMD_CPPC_EPP_PERF_MASK;
@@ -1168,9 +1167,11 @@ static ssize_t show_energy_performance_preference(
                                struct cpufreq_policy *policy, char *buf)
 {
        struct amd_cpudata *cpudata = policy->driver_data;
-       u8 preference;
+       u8 preference, epp;
+
+       epp = FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached);
 
-       switch (cpudata->epp_cached) {
+       switch (epp) {
        case AMD_CPPC_EPP_PERFORMANCE:
                preference = EPP_INDEX_PERFORMANCE;
                break;
@@ -1533,7 +1534,7 @@ static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
        if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
                epp = 0;
        else
-               epp = READ_ONCE(cpudata->epp_cached);
+               epp = FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached);
 
        perf = READ_ONCE(cpudata->perf);
 
index 1557e1afea79cdf6d2db8d77c133b0f871568d6d..fbe1c08d3f0616833a90e076032b4d804ed58a4f 100644 (file)
@@ -102,7 +102,6 @@ struct amd_cpudata {
        bool    hw_prefcore;
 
        /* EPP feature related attributes*/
-       u8      epp_cached;
        u32     policy;
        bool    suspended;
        u8      epp_default;