LoongArch: Use physical addresses for CSR_MERRENTRY/CSR_TLBRENTRY

Now we use virtual addresses to fill CSR_MERRENTRY/CSR_TLBRENTRY, but
hardware hope physical addresses. Now it works well because the high
bits are ignored above PA_BITS (48 bits), but explicitly use physical
addresses can avoid potential bugs. So fix it.

Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

diff --git a/arch/loongarch/kernel/traps.c b/arch/loongarch/kernel/traps.c
index 3d9be6ca7ec557e592129f318c140d30d260c5d2..da5926fead4af97ba02f9144b6b967bbd80ae2f7 100644 (file)
--- a/arch/loongarch/kernel/traps.c
+++ b/arch/loongarch/kernel/traps.c
@@ -1131,8 +1131,8 @@ static void configure_exception_vector(void)
        tlbrentry = (unsigned long)exception_handlers + 80*VECSIZE;
 
        csr_write64(eentry, LOONGARCH_CSR_EENTRY);
-       csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
-       csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
+       csr_write64(__pa(eentry), LOONGARCH_CSR_MERRENTRY);
+       csr_write64(__pa(tlbrentry), LOONGARCH_CSR_TLBRENTRY);
 }
 
 void per_cpu_trap_init(int cpu)