--- /dev/null
+From 68cceb451de31865ae118bf966340b569113c8dd Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 6 Feb 2023 21:37:20 +0100
+Subject: pinctrl: ocelot: Fix alt mode for ocelot
+
+From: Horatiu Vultur <horatiu.vultur@microchip.com>
+
+[ Upstream commit 657fd9da2d4b4aa0a384105b236baa22fa0233bf ]
+
+In case the driver was trying to set an alternate mode for gpio
+0 or 32 then the mode was not set correctly. The reason is that
+there is computation error inside the function ocelot_pinmux_set_mux
+because in this case it was trying to shift to left by -1.
+Fix this by actually shifting the function bits and not the position.
+
+Fixes: 4b36082e2e09 ("pinctrl: ocelot: fix pinmuxing for pins after 31")
+Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
+Link: https://lore.kernel.org/r/20230206203720.1177718-1-horatiu.vultur@microchip.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/pinctrl-ocelot.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
+index a4a1b00f7f0df..c42a5b0bc4f0c 100644
+--- a/drivers/pinctrl/pinctrl-ocelot.c
++++ b/drivers/pinctrl/pinctrl-ocelot.c
+@@ -575,7 +575,7 @@ static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
+ regmap_update_bits(info->map, REG_ALT(0, info, pin->pin),
+ BIT(p), f << p);
+ regmap_update_bits(info->map, REG_ALT(1, info, pin->pin),
+- BIT(p), f << (p - 1));
++ BIT(p), (f >> 1) << p);
+
+ return 0;
+ }
+--
+2.39.2
+