]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for mt8195 vdosys0
authorjason-jh.lin <jason-jh.lin@mediatek.com>
Tue, 19 Apr 2022 09:41:41 +0000 (17:41 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 22 Apr 2022 12:38:53 +0000 (14:38 +0200)
The mmsys routing table of mt8195 vdosys0 has 2 DITHER components,
so mmsys need to add DDP_COMPONENT_DITHER1 and change all usages of
DITHER enum form DDP_COMPONENT_DITHER to DDP_COMPONENT_DITHER0.

But its header need to keep DDP_COMPONENT_DITHER enum
until drm/mediatek also changed it.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220419094143.9561-7-jason-jh.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
drivers/soc/mediatek/mt8167-mmsys.h
drivers/soc/mediatek/mt8183-mmsys.h
drivers/soc/mediatek/mt8186-mmsys.h
drivers/soc/mediatek/mt8192-mmsys.h
drivers/soc/mediatek/mt8195-mmsys.h
drivers/soc/mediatek/mt8365-mmsys.h
drivers/soc/mediatek/mtk-mutex.c
include/linux/soc/mediatek/mtk-mmsys.h

index 2772ef5e3934cc2a532218dd7231ed3efffc479a..f7a35b3656bb135c57f3f99ec6cb3a70b82cf164 100644 (file)
@@ -18,7 +18,7 @@ static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
                DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
                MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0,
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_RDMA0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_RDMA0,
                MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_RDMA0
        }, {
                DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
index 0c021f4b76d2149fbeabf755e11938d4e12f5ac4..ff6be1703469899d014ddd0b77ed8123edb476c1 100644 (file)
@@ -41,7 +41,7 @@ static const struct mtk_mmsys_routes mmsys_mt8183_routing_table[] = {
                MT8183_DISP_OVL1_2L_MOUT_EN, MT8183_OVL1_2L_MOUT_EN_RDMA1,
                MT8183_OVL1_2L_MOUT_EN_RDMA1
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8183_DISP_DITHER0_MOUT_EN, MT8183_DITHER0_MOUT_IN_DSI0,
                MT8183_DITHER0_MOUT_IN_DSI0
        }, {
index c72ccf86ea28a0f8f46767ca12ac7b7dba0f9527..eb1ad9c37a9cb0177758c527569752beef8f3643 100644 (file)
@@ -76,12 +76,12 @@ static const struct mtk_mmsys_routes mmsys_mt8186_routing_table[] = {
                MT8186_RDMA0_SOUT_TO_COLOR0
        },
        {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8186_DISP_DITHER0_MOUT_EN, MT8186_DITHER0_MOUT_EN_MASK,
                MT8186_DITHER0_MOUT_TO_DSI0,
        },
        {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8186_DISP_DSI0_SEL_IN, MT8186_DSI0_SEL_IN_MASK,
                MT8186_DSI0_FROM_DITHER0
        },
index 6aae0b12b6ff907cc8a3d4b3ec4ad73b20091681..a016d80b4bc15f02b8fb4d5bc759a0ac17012bd8 100644 (file)
@@ -40,7 +40,7 @@ static const struct mtk_mmsys_routes mmsys_mt8192_routing_table[] = {
                MT8192_DISP_OVL2_2L_MOUT_EN, MT8192_OVL2_2L_MOUT_EN_RDMA4,
                MT8192_OVL2_2L_MOUT_EN_RDMA4
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8192_DISP_DITHER0_MOUT_EN, MT8192_DITHER0_MOUT_IN_DSI0,
                MT8192_DITHER0_MOUT_IN_DSI0
        }, {
@@ -52,7 +52,7 @@ static const struct mtk_mmsys_routes mmsys_mt8192_routing_table[] = {
                MT8192_DISP_AAL0_SEL_IN, MT8192_AAL0_SEL_IN_CCORR0,
                MT8192_AAL0_SEL_IN_CCORR0
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8192_DISP_DSI0_SEL_IN, MT8192_DSI0_SEL_IN_DITHER0,
                MT8192_DSI0_SEL_IN_DITHER0
        }, {
index 13ab0ab6439669a1a0ed081e31a0dd8f58612002..abfe94a302489c370922979ff559dc6a6c4a33c9 100644 (file)
@@ -113,7 +113,7 @@ static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
                MT8195_VDO0_SEL_IN, MT8195_SEL_IN_VPP_MERGE_FROM_MASK,
                MT8195_SEL_IN_VPP_MERGE_FROM_VDO1_VIRTUAL0
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSC0,
                MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP0_IN_FROM_MASK,
                MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0
        }, {
@@ -181,7 +181,7 @@ static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
                MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI0_FROM_MASK,
                MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI0_FROM_MASK,
                MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0
        }, {
@@ -245,11 +245,11 @@ static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
                MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DISP_WDMA0_FROM_MASK,
                MT8195_SEL_IN_DISP_WDMA0_FROM_DISP_OVL0
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSC0,
                MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_MASK,
                MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN
        }, {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_MASK,
                MT8195_SOUT_DISP_DITHER0_TO_DSI0
        }, {
index 690e3fe2dee0ae6d81d8e3abdb2fdc14db7caa75..24129a6c25f862c17ae51fab5f01b03044b925d5 100644 (file)
@@ -41,12 +41,12 @@ static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = {
                MT8365_DISP_COLOR_SEL_IN_COLOR0,MT8365_DISP_COLOR_SEL_IN_COLOR0
        },
        {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN,
                MT8365_DITHER_MOUT_EN_DSI0, MT8365_DITHER_MOUT_EN_DSI0
        },
        {
-               DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+               DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
                MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN,
                MT8365_DSI0_SEL_IN_DITHER, MT8365_DSI0_SEL_IN_DITHER
        },
index 729ee88035ed25ef9f56c029f3cc6395201ac878..9184684baf1d5e9ed18c8f2da243107dbed3134e 100644 (file)
@@ -232,7 +232,7 @@ static const unsigned int mt8167_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_AAL0] = MT8167_MUTEX_MOD_DISP_AAL,
        [DDP_COMPONENT_CCORR] = MT8167_MUTEX_MOD_DISP_CCORR,
        [DDP_COMPONENT_COLOR0] = MT8167_MUTEX_MOD_DISP_COLOR,
-       [DDP_COMPONENT_DITHER] = MT8167_MUTEX_MOD_DISP_DITHER,
+       [DDP_COMPONENT_DITHER0] = MT8167_MUTEX_MOD_DISP_DITHER,
        [DDP_COMPONENT_GAMMA] = MT8167_MUTEX_MOD_DISP_GAMMA,
        [DDP_COMPONENT_OVL0] = MT8167_MUTEX_MOD_DISP_OVL0,
        [DDP_COMPONENT_OVL1] = MT8167_MUTEX_MOD_DISP_OVL1,
@@ -265,7 +265,7 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0,
        [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0,
        [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0,
-       [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0,
+       [DDP_COMPONENT_DITHER0] = MT8183_MUTEX_MOD_DISP_DITHER0,
        [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0,
        [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0,
        [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L,
@@ -279,7 +279,7 @@ static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0,
        [DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0,
        [DDP_COMPONENT_COLOR0] = MT8186_MUTEX_MOD_DISP_COLOR0,
-       [DDP_COMPONENT_DITHER] = MT8186_MUTEX_MOD_DISP_DITHER0,
+       [DDP_COMPONENT_DITHER0] = MT8186_MUTEX_MOD_DISP_DITHER0,
        [DDP_COMPONENT_GAMMA] = MT8186_MUTEX_MOD_DISP_GAMMA0,
        [DDP_COMPONENT_OVL0] = MT8186_MUTEX_MOD_DISP_OVL0,
        [DDP_COMPONENT_OVL_2L0] = MT8186_MUTEX_MOD_DISP_OVL0_2L,
@@ -292,7 +292,7 @@ static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,
        [DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,
        [DDP_COMPONENT_COLOR0] = MT8192_MUTEX_MOD_DISP_COLOR0,
-       [DDP_COMPONENT_DITHER] = MT8192_MUTEX_MOD_DISP_DITHER0,
+       [DDP_COMPONENT_DITHER0] = MT8192_MUTEX_MOD_DISP_DITHER0,
        [DDP_COMPONENT_GAMMA] = MT8192_MUTEX_MOD_DISP_GAMMA0,
        [DDP_COMPONENT_POSTMASK0] = MT8192_MUTEX_MOD_DISP_POSTMASK0,
        [DDP_COMPONENT_OVL0] = MT8192_MUTEX_MOD_DISP_OVL0,
@@ -310,7 +310,7 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_CCORR] = MT8195_MUTEX_MOD_DISP_CCORR0,
        [DDP_COMPONENT_AAL0] = MT8195_MUTEX_MOD_DISP_AAL0,
        [DDP_COMPONENT_GAMMA] = MT8195_MUTEX_MOD_DISP_GAMMA0,
-       [DDP_COMPONENT_DITHER] = MT8195_MUTEX_MOD_DISP_DITHER0,
+       [DDP_COMPONENT_DITHER0] = MT8195_MUTEX_MOD_DISP_DITHER0,
        [DDP_COMPONENT_MERGE0] = MT8195_MUTEX_MOD_DISP_VPP_MERGE,
        [DDP_COMPONENT_DSC0] = MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE0,
        [DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0,
index cff5c9adbf46266486afc259a6e2fef45370385b..59117d970daf9cbd6f0930134382c2eae7d68278 100644 (file)
@@ -17,6 +17,7 @@ enum mtk_ddp_comp_id {
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_COLOR1,
        DDP_COMPONENT_DITHER,
+       DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER,
        DDP_COMPONENT_DITHER1,
        DDP_COMPONENT_DP_INTF0,
        DDP_COMPONENT_DP_INTF1,