drm/mediatek: dp: Add sdp path reset

When using type-c to type-c to connect to the monitor,
the sound plays normally. If you unplug the type-c and
connect the type-c to hdmi dongle to the monitor, there will be noise.

By capturing the audio data, it is found that
the data position is messy, and there is no error in the data.

Through experiments, it can be restored by resetting the SDP path
when unplugging it.

Signed-off-by: Liankun Yang <liankun.yang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20241128023733.16294-1-liankun.yang@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
index 1cc916b164713d71461a0b2ad370032a14604be6..4f4233bd83f77dbda431fdd4c700503c6dfe2de2 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dp.c
+++ b/drivers/gpu/drm/mediatek/mtk_dp.c
@@ -1135,6 +1135,18 @@ static void mtk_dp_digital_sw_reset(struct mtk_dp *mtk_dp)
                           0, DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0);
 }
 
+static void mtk_dp_sdp_path_reset(struct mtk_dp *mtk_dp)
+{
+       mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,
+                          SDP_RESET_SW_DP_ENC0_P0,
+                          SDP_RESET_SW_DP_ENC0_P0);
+
+       /* Wait for sdp path reset to complete */
+       usleep_range(1000, 5000);
+       mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,
+                          0, SDP_RESET_SW_DP_ENC0_P0);
+}
+
 static void mtk_dp_set_lanes(struct mtk_dp *mtk_dp, int lanes)
 {
        mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_35F0,
@@ -2397,6 +2409,9 @@ static void mtk_dp_bridge_atomic_disable(struct drm_bridge *bridge,
                           DP_PWR_STATE_BANDGAP_TPLL,
                           DP_PWR_STATE_MASK);
 
+       /* SDP path reset sw*/
+       mtk_dp_sdp_path_reset(mtk_dp);
+
        /* Ensure the sink is muted */
        msleep(20);
 }

diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
index 709b79480693da4bb39091f6e7c32c2e54717ed7..8ad7a9cc259eb20ff688daec6f04f011ad3a6faa 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
+++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
@@ -86,6 +86,7 @@
 #define MTK_DP_ENC0_P0_3004                    0x3004
 #define VIDEO_M_CODE_SEL_DP_ENC0_P0_MASK               BIT(8)
 #define DP_TX_ENCODER_4P_RESET_SW_DP_ENC0_P0           BIT(9)
+#define SDP_RESET_SW_DP_ENC0_P0                                BIT(13)
 #define MTK_DP_ENC0_P0_3010                    0x3010
 #define HTOTAL_SW_DP_ENC0_P0_MASK                      GENMASK(15, 0)
 #define MTK_DP_ENC0_P0_3014                    0x3014