--- /dev/null
+From 043d2da65990b76f449b7db45f40b19458be7e2d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 22 Sep 2020 14:40:46 +0200
+Subject: clk: samsung: exynos4: mark 'chipid' clock as CLK_IGNORE_UNUSED
+
+From: Marek Szyprowski <m.szyprowski@samsung.com>
+
+[ Upstream commit f3bb0f796f5ffe32f0fbdce5b1b12eb85511158f ]
+
+The ChipID IO region has it's own clock, which is being disabled while
+scanning for unused clocks. It turned out that some CPU hotplug, CPU idle
+or even SOC firmware code depends on the reads from that area. Fix the
+mysterious hang caused by entering deep CPU idle state by ignoring the
+'chipid' clock during unused clocks scan, as there are no direct clients
+for it which will keep it enabled.
+
+Fixes: e062b571777f ("clk: exynos4: register clocks using common clock framework")
+Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
+Link: https://lore.kernel.org/r/20200922124046.10496-1-m.szyprowski@samsung.com
+Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
+Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/clk/samsung/clk-exynos4.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
+index 51564fc23c639..f4086287bb71b 100644
+--- a/drivers/clk/samsung/clk-exynos4.c
++++ b/drivers/clk/samsung/clk-exynos4.c
+@@ -927,7 +927,7 @@ static const struct samsung_gate_clock exynos4210_gate_clks[] __initconst = {
+ GATE(CLK_PCIE, "pcie", "aclk133", GATE_IP_FSYS, 14, 0, 0),
+ GATE(CLK_SMMU_PCIE, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0),
+ GATE(CLK_MODEMIF, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0),
+- GATE(CLK_CHIPID, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0),
++ GATE(CLK_CHIPID, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0),
+ GATE(CLK_SYSREG, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0,
+ CLK_IGNORE_UNUSED, 0),
+ GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0,
+@@ -969,7 +969,7 @@ static const struct samsung_gate_clock exynos4x12_gate_clks[] __initconst = {
+ 0),
+ GATE(CLK_TSADC, "tsadc", "aclk133", E4X12_GATE_BUS_FSYS1, 16, 0, 0),
+ GATE(CLK_MIPI_HSI, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0),
+- GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0),
++ GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0),
+ GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
+ CLK_IGNORE_UNUSED, 0),
+ GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0,
+--
+2.25.1
+
--- /dev/null
+From 9a157c0ca1831f3f1f46f26c6d0e911245082404 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 3 Jun 2020 13:13:07 +0200
+Subject: clk: tegra: Always program PLL_E when enabled
+
+From: Thierry Reding <treding@nvidia.com>
+
+[ Upstream commit 5105660ee80862b85f7769626d0f936c18ce1885 ]
+
+Commit bff1cef5f23a ("clk: tegra: Don't enable already enabled PLLs")
+added checks to avoid enabling PLLs that have already been enabled by
+the bootloader. However, the PLL_E configuration inherited from the
+bootloader isn't necessarily the one that is needed for the kernel.
+
+This can cause SATA to fail like this:
+
+ [ 5.310270] phy phy-sata.6: phy poweron failed --> -110
+ [ 5.315604] tegra-ahci 70027000.sata: failed to power on AHCI controller: -110
+ [ 5.323022] tegra-ahci: probe of 70027000.sata failed with error -110
+
+Fix this by always programming the PLL_E. This ensures that any mis-
+configuration by the bootloader will be overwritten by the kernel.
+
+Fixes: bff1cef5f23a ("clk: tegra: Don't enable already enabled PLLs")
+Reported-by: LABBE Corentin <clabbe@baylibre.com>
+Tested-by: Corentin Labbe <clabbe@baylibre.com>
+Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/clk/tegra/clk-pll.c | 3 ---
+ 1 file changed, 3 deletions(-)
+
+diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
+index 1583f5fc992f3..80f640d9ea71c 100644
+--- a/drivers/clk/tegra/clk-pll.c
++++ b/drivers/clk/tegra/clk-pll.c
+@@ -1569,9 +1569,6 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw)
+ unsigned long flags = 0;
+ unsigned long input_rate;
+
+- if (clk_pll_is_enabled(hw))
+- return 0;
+-
+ input_rate = clk_hw_get_rate(clk_hw_get_parent(hw));
+
+ if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
+--
+2.25.1
+
--- /dev/null
+From 17cb35f1a318c5809d899ec71d11e18c643a0201 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 16 Sep 2020 13:42:16 -0700
+Subject: gpio: aspeed: fix ast2600 bank properties
+
+From: Tao Ren <rentao.bupt@gmail.com>
+
+[ Upstream commit 3e640b1eec38e4c8eba160f26cba4f592e657f3d ]
+
+GPIO_U is mapped to the least significant byte of input/output mask, and
+the byte in "output" mask should be 0 because GPIO_U is input only. All
+the other bits need to be 1 because GPIO_V/W/X support both input and
+output modes.
+
+Similarly, GPIO_Y/Z are mapped to the 2 least significant bytes, and the
+according bits need to be 1 because GPIO_Y/Z support both input and
+output modes.
+
+Fixes: ab4a85534c3e ("gpio: aspeed: Add in ast2600 details to Aspeed driver")
+Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
+Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
+Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpio/gpio-aspeed.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
+index 09e53c5f3b0a4..2820c59b5f071 100644
+--- a/drivers/gpio/gpio-aspeed.c
++++ b/drivers/gpio/gpio-aspeed.c
+@@ -1115,8 +1115,8 @@ static const struct aspeed_gpio_config ast2500_config =
+
+ static const struct aspeed_bank_props ast2600_bank_props[] = {
+ /* input output */
+- {5, 0xffffffff, 0x0000ffff}, /* U/V/W/X */
+- {6, 0xffff0000, 0x0fff0000}, /* Y/Z */
++ {5, 0xffffffff, 0xffffff00}, /* U/V/W/X */
++ {6, 0x0000ffff, 0x0000ffff}, /* Y/Z */
+ { },
+ };
+
+--
+2.25.1
+
--- /dev/null
+From 87aeb8e4c43ad1782569608f8967be1dc8bccb90 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 11 Sep 2020 09:51:05 +0800
+Subject: gpio/aspeed-sgpio: don't enable all interrupts by default
+
+From: Jeremy Kerr <jk@codeconstruct.com.au>
+
+[ Upstream commit bf0d394e885015941ed2d5724c0a6ed8d42dd95e ]
+
+Currently, the IRQ setup for the SGPIO driver enables all interrupts in
+dual-edge trigger mode. Since the default handler is handle_bad_irq, any
+state change on input GPIOs will trigger bad IRQ warnings.
+
+This change applies sensible IRQ defaults: single-edge trigger, and all
+IRQs disabled.
+
+Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
+Fixes: 7db47faae79b ("gpio: aspeed: Add SGPIO driver")
+Reviewed-by: Joel Stanley <joel@jms.id.au>
+Acked-by: Andrew Jeffery <andrew@aj.id.au>
+Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpio/sgpio-aspeed.c | 8 +++-----
+ 1 file changed, 3 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/gpio/sgpio-aspeed.c b/drivers/gpio/sgpio-aspeed.c
+index 7cd86d5e8dc90..3a5dfb8ded1fb 100644
+--- a/drivers/gpio/sgpio-aspeed.c
++++ b/drivers/gpio/sgpio-aspeed.c
+@@ -452,17 +452,15 @@ static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
+ irq->parents = &gpio->irq;
+ irq->num_parents = 1;
+
+- /* set IRQ settings and Enable Interrupt */
++ /* Apply default IRQ settings */
+ for (i = 0; i < ARRAY_SIZE(aspeed_sgpio_banks); i++) {
+ bank = &aspeed_sgpio_banks[i];
+ /* set falling or level-low irq */
+ iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type0));
+ /* trigger type is edge */
+ iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type1));
+- /* dual edge trigger mode. */
+- iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_type2));
+- /* enable irq */
+- iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_enable));
++ /* single edge trigger */
++ iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type2));
+ }
+
+ return 0;
+--
+2.25.1
+
--- /dev/null
+From 93649eeef55a3719918261fb7db6559e0c521ed5 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 11 Sep 2020 09:51:04 +0800
+Subject: gpio/aspeed-sgpio: enable access to all 80 input & output sgpios
+
+From: Jeremy Kerr <jk@codeconstruct.com.au>
+
+[ Upstream commit ac67b07e268d46eba675a60c37051bb3e59fd201 ]
+
+Currently, the aspeed-sgpio driver exposes up to 80 GPIO lines,
+corresponding to the 80 status bits available in hardware. Each of these
+lines can be configured as either an input or an output.
+
+However, each of these GPIOs is actually an input *and* an output; we
+actually have 80 inputs plus 80 outputs.
+
+This change expands the maximum number of GPIOs to 160; the lower half
+of this range are the input-only GPIOs, the upper half are the outputs.
+We fix the GPIO directions to correspond to this mapping.
+
+This also fixes a bug when setting GPIOs - we were reading from the
+input register, making it impossible to set more than one output GPIO.
+
+Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
+Fixes: 7db47faae79b ("gpio: aspeed: Add SGPIO driver")
+Reviewed-by: Joel Stanley <joel@jms.id.au>
+Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ .../devicetree/bindings/gpio/sgpio-aspeed.txt | 5 +-
+ drivers/gpio/sgpio-aspeed.c | 126 ++++++++++++------
+ 2 files changed, 87 insertions(+), 44 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
+index d4d83916c09dd..be329ea4794f8 100644
+--- a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
++++ b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
+@@ -20,8 +20,9 @@ Required properties:
+ - gpio-controller : Marks the device node as a GPIO controller
+ - interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
+ - interrupt-controller : Mark the GPIO controller as an interrupt-controller
+-- ngpios : number of GPIO lines, see gpio.txt
+- (should be multiple of 8, up to 80 pins)
++- ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose
++ 2 software GPIOs per hardware GPIO: one for hardware input, one for hardware
++ output. Up to 80 pins, must be a multiple of 8.
+ - clocks : A phandle to the APB clock for SGPM clock division
+ - bus-frequency : SGPM CLK frequency
+
+diff --git a/drivers/gpio/sgpio-aspeed.c b/drivers/gpio/sgpio-aspeed.c
+index 8319812593e31..7cd86d5e8dc90 100644
+--- a/drivers/gpio/sgpio-aspeed.c
++++ b/drivers/gpio/sgpio-aspeed.c
+@@ -17,7 +17,17 @@
+ #include <linux/spinlock.h>
+ #include <linux/string.h>
+
+-#define MAX_NR_SGPIO 80
++/*
++ * MAX_NR_HW_GPIO represents the number of actual hardware-supported GPIOs (ie,
++ * slots within the clocked serial GPIO data). Since each HW GPIO is both an
++ * input and an output, we provide MAX_NR_HW_GPIO * 2 lines on our gpiochip
++ * device.
++ *
++ * We use SGPIO_OUTPUT_OFFSET to define the split between the inputs and
++ * outputs; the inputs start at line 0, the outputs start at OUTPUT_OFFSET.
++ */
++#define MAX_NR_HW_SGPIO 80
++#define SGPIO_OUTPUT_OFFSET MAX_NR_HW_SGPIO
+
+ #define ASPEED_SGPIO_CTRL 0x54
+
+@@ -30,8 +40,8 @@ struct aspeed_sgpio {
+ struct clk *pclk;
+ spinlock_t lock;
+ void __iomem *base;
+- uint32_t dir_in[3];
+ int irq;
++ int n_sgpio;
+ };
+
+ struct aspeed_sgpio_bank {
+@@ -111,31 +121,69 @@ static void __iomem *bank_reg(struct aspeed_sgpio *gpio,
+ }
+ }
+
+-#define GPIO_BANK(x) ((x) >> 5)
+-#define GPIO_OFFSET(x) ((x) & 0x1f)
++#define GPIO_BANK(x) ((x % SGPIO_OUTPUT_OFFSET) >> 5)
++#define GPIO_OFFSET(x) ((x % SGPIO_OUTPUT_OFFSET) & 0x1f)
+ #define GPIO_BIT(x) BIT(GPIO_OFFSET(x))
+
+ static const struct aspeed_sgpio_bank *to_bank(unsigned int offset)
+ {
+- unsigned int bank = GPIO_BANK(offset);
++ unsigned int bank;
++
++ bank = GPIO_BANK(offset);
+
+ WARN_ON(bank >= ARRAY_SIZE(aspeed_sgpio_banks));
+ return &aspeed_sgpio_banks[bank];
+ }
+
++static int aspeed_sgpio_init_valid_mask(struct gpio_chip *gc,
++ unsigned long *valid_mask, unsigned int ngpios)
++{
++ struct aspeed_sgpio *sgpio = gpiochip_get_data(gc);
++ int n = sgpio->n_sgpio;
++ int c = SGPIO_OUTPUT_OFFSET - n;
++
++ WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2);
++
++ /* input GPIOs in the lower range */
++ bitmap_set(valid_mask, 0, n);
++ bitmap_clear(valid_mask, n, c);
++
++ /* output GPIOS above SGPIO_OUTPUT_OFFSET */
++ bitmap_set(valid_mask, SGPIO_OUTPUT_OFFSET, n);
++ bitmap_clear(valid_mask, SGPIO_OUTPUT_OFFSET + n, c);
++
++ return 0;
++}
++
++static void aspeed_sgpio_irq_init_valid_mask(struct gpio_chip *gc,
++ unsigned long *valid_mask, unsigned int ngpios)
++{
++ struct aspeed_sgpio *sgpio = gpiochip_get_data(gc);
++ int n = sgpio->n_sgpio;
++
++ WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2);
++
++ /* input GPIOs in the lower range */
++ bitmap_set(valid_mask, 0, n);
++ bitmap_clear(valid_mask, n, ngpios - n);
++}
++
++static bool aspeed_sgpio_is_input(unsigned int offset)
++{
++ return offset < SGPIO_OUTPUT_OFFSET;
++}
++
+ static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
+ {
+ struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
+ const struct aspeed_sgpio_bank *bank = to_bank(offset);
+ unsigned long flags;
+ enum aspeed_sgpio_reg reg;
+- bool is_input;
+ int rc = 0;
+
+ spin_lock_irqsave(&gpio->lock, flags);
+
+- is_input = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
+- reg = is_input ? reg_val : reg_rdata;
++ reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
+ rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
+
+ spin_unlock_irqrestore(&gpio->lock, flags);
+@@ -143,22 +191,31 @@ static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
+ return rc;
+ }
+
+-static void sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
++static int sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
+ {
+ struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
+ const struct aspeed_sgpio_bank *bank = to_bank(offset);
+- void __iomem *addr;
++ void __iomem *addr_r, *addr_w;
+ u32 reg = 0;
+
+- addr = bank_reg(gpio, bank, reg_val);
+- reg = ioread32(addr);
++ if (aspeed_sgpio_is_input(offset))
++ return -EINVAL;
++
++ /* Since this is an output, read the cached value from rdata, then
++ * update val. */
++ addr_r = bank_reg(gpio, bank, reg_rdata);
++ addr_w = bank_reg(gpio, bank, reg_val);
++
++ reg = ioread32(addr_r);
+
+ if (val)
+ reg |= GPIO_BIT(offset);
+ else
+ reg &= ~GPIO_BIT(offset);
+
+- iowrite32(reg, addr);
++ iowrite32(reg, addr_w);
++
++ return 0;
+ }
+
+ static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
+@@ -175,43 +232,28 @@ static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
+
+ static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
+ {
+- struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
+- unsigned long flags;
+-
+- spin_lock_irqsave(&gpio->lock, flags);
+- gpio->dir_in[GPIO_BANK(offset)] |= GPIO_BIT(offset);
+- spin_unlock_irqrestore(&gpio->lock, flags);
+-
+- return 0;
++ return aspeed_sgpio_is_input(offset) ? 0 : -EINVAL;
+ }
+
+ static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)
+ {
+ struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
+ unsigned long flags;
++ int rc;
+
+- spin_lock_irqsave(&gpio->lock, flags);
+-
+- gpio->dir_in[GPIO_BANK(offset)] &= ~GPIO_BIT(offset);
+- sgpio_set_value(gc, offset, val);
++ /* No special action is required for setting the direction; we'll
++ * error-out in sgpio_set_value if this isn't an output GPIO */
+
++ spin_lock_irqsave(&gpio->lock, flags);
++ rc = sgpio_set_value(gc, offset, val);
+ spin_unlock_irqrestore(&gpio->lock, flags);
+
+- return 0;
++ return rc;
+ }
+
+ static int aspeed_sgpio_get_direction(struct gpio_chip *gc, unsigned int offset)
+ {
+- int dir_status;
+- struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
+- unsigned long flags;
+-
+- spin_lock_irqsave(&gpio->lock, flags);
+- dir_status = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
+- spin_unlock_irqrestore(&gpio->lock, flags);
+-
+- return dir_status;
+-
++ return !!aspeed_sgpio_is_input(offset);
+ }
+
+ static void irqd_to_aspeed_sgpio_data(struct irq_data *d,
+@@ -402,6 +444,7 @@ static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
+
+ irq = &gpio->chip.irq;
+ irq->chip = &aspeed_sgpio_irqchip;
++ irq->init_valid_mask = aspeed_sgpio_irq_init_valid_mask;
+ irq->handler = handle_bad_irq;
+ irq->default_type = IRQ_TYPE_NONE;
+ irq->parent_handler = aspeed_sgpio_irq_handler;
+@@ -452,11 +495,12 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev)
+ if (rc < 0) {
+ dev_err(&pdev->dev, "Could not read ngpios property\n");
+ return -EINVAL;
+- } else if (nr_gpios > MAX_NR_SGPIO) {
++ } else if (nr_gpios > MAX_NR_HW_SGPIO) {
+ dev_err(&pdev->dev, "Number of GPIOs exceeds the maximum of %d: %d\n",
+- MAX_NR_SGPIO, nr_gpios);
++ MAX_NR_HW_SGPIO, nr_gpios);
+ return -EINVAL;
+ }
++ gpio->n_sgpio = nr_gpios;
+
+ rc = of_property_read_u32(pdev->dev.of_node, "bus-frequency", &sgpio_freq);
+ if (rc < 0) {
+@@ -497,7 +541,8 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev)
+ spin_lock_init(&gpio->lock);
+
+ gpio->chip.parent = &pdev->dev;
+- gpio->chip.ngpio = nr_gpios;
++ gpio->chip.ngpio = MAX_NR_HW_SGPIO * 2;
++ gpio->chip.init_valid_mask = aspeed_sgpio_init_valid_mask;
+ gpio->chip.direction_input = aspeed_sgpio_dir_in;
+ gpio->chip.direction_output = aspeed_sgpio_dir_out;
+ gpio->chip.get_direction = aspeed_sgpio_get_direction;
+@@ -509,9 +554,6 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev)
+ gpio->chip.label = dev_name(&pdev->dev);
+ gpio->chip.base = -1;
+
+- /* set all SGPIO pins as input (1). */
+- memset(gpio->dir_in, 0xff, sizeof(gpio->dir_in));
+-
+ aspeed_sgpio_setup_irqs(gpio, pdev);
+
+ rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
+--
+2.25.1
+
--- /dev/null
+From ceb3d57d73d5d9d406b35c9851385ee23eeb9cb2 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 31 Aug 2020 17:09:47 +0800
+Subject: gpio: sprd: Clear interrupt when setting the type as edge
+
+From: Taiping Lai <taiping.lai@unisoc.com>
+
+[ Upstream commit 5fcface659aab7eac4bd65dd116d98b8f7bb88d5 ]
+
+The raw interrupt status of GPIO maybe set before the interrupt is enabled,
+which would trigger the interrupt event once enabled it from user side.
+This is the case for edge interrupts only. Adding a clear operation when
+setting interrupt type can avoid that.
+
+There're a few considerations for the solution:
+1) This issue is for edge interrupt only; The interrupts requested by users
+ are IRQ_TYPE_LEVEL_HIGH as default, so clearing interrupt when request
+ is useless.
+2) The interrupt type can be set to edge when request and following up
+ with clearing it though, but the problem is still there once users set
+ the interrupt type to level trggier.
+3) We can add a clear operation after each time of setting interrupt
+ enable bit, but it is redundant for level trigger interrupt.
+
+Therefore, the solution is this patch seems the best for now.
+
+Fixes: 9a3821c2bb47 ("gpio: Add GPIO driver for Spreadtrum SC9860 platform")
+Signed-off-by: Taiping Lai <taiping.lai@unisoc.com>
+Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
+Reviewed-by: Baolin Wang <baolin.wang7@gmail.com>
+Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpio/gpio-sprd.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/gpio/gpio-sprd.c b/drivers/gpio/gpio-sprd.c
+index d7314d39ab65b..36ea8a3bd4510 100644
+--- a/drivers/gpio/gpio-sprd.c
++++ b/drivers/gpio/gpio-sprd.c
+@@ -149,17 +149,20 @@ static int sprd_gpio_irq_set_type(struct irq_data *data,
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1);
++ sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
+ irq_set_handler_locked(data, handle_edge_irq);
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0);
++ sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
+ irq_set_handler_locked(data, handle_edge_irq);
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
+ sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 1);
++ sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
+ irq_set_handler_locked(data, handle_edge_irq);
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+--
+2.25.1
+
--- /dev/null
+From 2b81d8cea88956837a14ef99ff48ddbeb7107e53 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 23 Sep 2020 16:08:40 +0200
+Subject: i2c: cpm: Fix i2c_ram structure
+
+From: Nicolas VINCENT <nicolas.vincent@vossloh.com>
+
+[ Upstream commit a2bd970aa62f2f7f80fd0d212b1d4ccea5df4aed ]
+
+the i2c_ram structure is missing the sdmatmp field mentionned in
+datasheet for MPC8272 at paragraph 36.5. With this field missing, the
+hardware would write past the allocated memory done through
+cpm_muram_alloc for the i2c_ram structure and land in memory allocated
+for the buffers descriptors corrupting the cbd_bufaddr field. Since this
+field is only set during setup(), the first i2c transaction would work
+and the following would send data read from an arbitrary memory
+location.
+
+Fixes: 61045dbe9d8d ("i2c: Add support for I2C bus on Freescale CPM1/CPM2 controllers")
+Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
+Acked-by: Jochen Friedrich <jochen@scram.de>
+Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu>
+Signed-off-by: Wolfram Sang <wsa@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/i2c/busses/i2c-cpm.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
+index 1213e1932ccb5..24d584a1c9a78 100644
+--- a/drivers/i2c/busses/i2c-cpm.c
++++ b/drivers/i2c/busses/i2c-cpm.c
+@@ -65,6 +65,9 @@ struct i2c_ram {
+ char res1[4]; /* Reserved */
+ ushort rpbase; /* Relocation pointer */
+ char res2[2]; /* Reserved */
++ /* The following elements are only for CPM2 */
++ char res3[4]; /* Reserved */
++ uint sdmatmp; /* Internal */
+ };
+
+ #define I2COM_START 0x80
+--
+2.25.1
+
--- /dev/null
+From 9c6162ef1aeeeb4288e70a8984176300b1bb394f Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 28 Sep 2020 16:19:05 -0700
+Subject: Input: trackpoint - enable Synaptics trackpoints
+
+From: Vincent Huang <vincent.huang@tw.synaptics.com>
+
+[ Upstream commit 996d585b079ad494a30cac10e08585bcd5345125 ]
+
+Add Synaptics IDs in trackpoint_start_protocol() to mark them as valid.
+
+Signed-off-by: Vincent Huang <vincent.huang@tw.synaptics.com>
+Fixes: 6c77545af100 ("Input: trackpoint - add new trackpoint variant IDs")
+Reviewed-by: Harry Cutts <hcutts@chromium.org>
+Tested-by: Harry Cutts <hcutts@chromium.org>
+Link: https://lore.kernel.org/r/20200924053013.1056953-1-vincent.huang@tw.synaptics.com
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/input/mouse/trackpoint.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/input/mouse/trackpoint.c b/drivers/input/mouse/trackpoint.c
+index 854d5e7587241..ef2fa0905208d 100644
+--- a/drivers/input/mouse/trackpoint.c
++++ b/drivers/input/mouse/trackpoint.c
+@@ -282,6 +282,8 @@ static int trackpoint_start_protocol(struct psmouse *psmouse,
+ case TP_VARIANT_ALPS:
+ case TP_VARIANT_ELAN:
+ case TP_VARIANT_NXP:
++ case TP_VARIANT_JYT_SYNAPTICS:
++ case TP_VARIANT_SYNAPTICS:
+ if (variant_id)
+ *variant_id = param[0];
+ if (firmware_id)
+--
+2.25.1
+
--- /dev/null
+From c6ba8bba87cb5cd3a57fc1c9d631b67d4fa5c340 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 18 Sep 2020 09:13:35 +0800
+Subject: iommu/exynos: add missing put_device() call in
+ exynos_iommu_of_xlate()
+
+From: Yu Kuai <yukuai3@huawei.com>
+
+[ Upstream commit 1a26044954a6d1f4d375d5e62392446af663be7a ]
+
+if of_find_device_by_node() succeed, exynos_iommu_of_xlate() doesn't have
+a corresponding put_device(). Thus add put_device() to fix the exception
+handling for this function implementation.
+
+Fixes: aa759fd376fb ("iommu/exynos: Add callback for initializing devices from device tree")
+Signed-off-by: Yu Kuai <yukuai3@huawei.com>
+Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
+Link: https://lore.kernel.org/r/20200918011335.909141-1-yukuai3@huawei.com
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iommu/exynos-iommu.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
+index 9c94e16fb1277..55ed857f804f7 100644
+--- a/drivers/iommu/exynos-iommu.c
++++ b/drivers/iommu/exynos-iommu.c
+@@ -1299,13 +1299,17 @@ static int exynos_iommu_of_xlate(struct device *dev,
+ return -ENODEV;
+
+ data = platform_get_drvdata(sysmmu);
+- if (!data)
++ if (!data) {
++ put_device(&sysmmu->dev);
+ return -ENODEV;
++ }
+
+ if (!owner) {
+ owner = kzalloc(sizeof(*owner), GFP_KERNEL);
+- if (!owner)
++ if (!owner) {
++ put_device(&sysmmu->dev);
+ return -ENOMEM;
++ }
+
+ INIT_LIST_HEAD(&owner->controllers);
+ mutex_init(&owner->rpm_lock);
+--
+2.25.1
+
--- /dev/null
+From 85c52913752a728732bb78c47380d8914b909af1 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 15 Sep 2020 16:42:52 -0500
+Subject: nfs: Fix security label length not being reset
+
+From: Jeffrey Mitchell <jeffrey.mitchell@starlab.io>
+
+[ Upstream commit d33030e2ee3508d65db5644551435310df86010e ]
+
+nfs_readdir_page_filler() iterates over entries in a directory, reusing
+the same security label buffer, but does not reset the buffer's length.
+This causes decode_attr_security_label() to return -ERANGE if an entry's
+security label is longer than the previous one's. This error, in
+nfs4_decode_dirent(), only gets passed up as -EAGAIN, which causes another
+failed attempt to copy into the buffer. The second error is ignored and
+the remaining entries do not show up in ls, specifically the getdents64()
+syscall.
+
+Reproduce by creating multiple files in NFS and giving one of the later
+files a longer security label. ls will not see that file nor any that are
+added afterwards, though they will exist on the backend.
+
+In nfs_readdir_page_filler(), reset security label buffer length before
+every reuse
+
+Signed-off-by: Jeffrey Mitchell <jeffrey.mitchell@starlab.io>
+Fixes: b4487b935452 ("nfs: Fix getxattr kernel panic and memory overflow")
+Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ fs/nfs/dir.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c
+index 05ed7be8a6345..188b17a3b19eb 100644
+--- a/fs/nfs/dir.c
++++ b/fs/nfs/dir.c
+@@ -553,6 +553,9 @@ int nfs_readdir_page_filler(nfs_readdir_descriptor_t *desc, struct nfs_entry *en
+ xdr_set_scratch_buffer(&stream, page_address(scratch), PAGE_SIZE);
+
+ do {
++ if (entry->label)
++ entry->label->len = NFS4_MAXLABELLEN;
++
+ status = xdr_decode(desc, entry, &stream);
+ if (status != 0) {
+ if (status == -EAGAIN)
+--
+2.25.1
+
--- /dev/null
+From 6b315e9b57e7d1c066bf184cbb5c7fd70910aade Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sat, 5 Sep 2020 15:46:48 +0300
+Subject: phy: ti: am654: Fix a leak in serdes_am654_probe()
+
+From: Dan Carpenter <dan.carpenter@oracle.com>
+
+[ Upstream commit 850280156f6421a404f2351bee07a0e7bedfd4c6 ]
+
+If devm_phy_create() fails then we need to call of_clk_del_provider(node)
+to undo the call to of_clk_add_provider().
+
+Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Link: https://lore.kernel.org/r/20200905124648.GA183976@mwanda
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/phy/ti/phy-am654-serdes.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/phy/ti/phy-am654-serdes.c b/drivers/phy/ti/phy-am654-serdes.c
+index 88a047b9fa6fa..6ef12017ff4e8 100644
+--- a/drivers/phy/ti/phy-am654-serdes.c
++++ b/drivers/phy/ti/phy-am654-serdes.c
+@@ -625,8 +625,10 @@ static int serdes_am654_probe(struct platform_device *pdev)
+ pm_runtime_enable(dev);
+
+ phy = devm_phy_create(dev, NULL, &ops);
+- if (IS_ERR(phy))
+- return PTR_ERR(phy);
++ if (IS_ERR(phy)) {
++ ret = PTR_ERR(phy);
++ goto clk_err;
++ }
+
+ phy_set_drvdata(phy, am654_phy);
+ phy_provider = devm_of_phy_provider_register(dev, serdes_am654_xlate);
+--
+2.25.1
+
--- /dev/null
+From 83137b534925a9b8a9a1a9d4477cec604a527ff7 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 8 Sep 2020 09:17:10 +1200
+Subject: pinctrl: mvebu: Fix i2c sda definition for 98DX3236
+
+From: Chris Packham <chris.packham@alliedtelesis.co.nz>
+
+[ Upstream commit 63c3212e7a37d68c89a13bdaebce869f4e064e67 ]
+
+Per the datasheet the i2c functions use MPP_Sel=0x1. They are documented
+as using MPP_Sel=0x4 as well but mixing 0x1 and 0x4 is clearly wrong. On
+the board tested 0x4 resulted in a non-functioning i2c bus so stick with
+0x1 which works.
+
+Fixes: d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC")
+Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://lore.kernel.org/r/20200907211712.9697-2-chris.packham@alliedtelesis.co.nz
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+index a767a05fa3a0d..48e2a6c56a83b 100644
+--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
++++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+@@ -414,7 +414,7 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
+ MPP_VAR_FUNCTION(0x1, "i2c0", "sck", V_98DX3236_PLUS)),
+ MPP_MODE(15,
+ MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
+- MPP_VAR_FUNCTION(0x4, "i2c0", "sda", V_98DX3236_PLUS)),
++ MPP_VAR_FUNCTION(0x1, "i2c0", "sda", V_98DX3236_PLUS)),
+ MPP_MODE(16,
+ MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
+ MPP_VAR_FUNCTION(0x4, "dev", "oe", V_98DX3236_PLUS)),
+--
+2.25.1
+
--- /dev/null
+From f19263af0cafdbd1c8bbc1a2f86e00b80ccc1f47 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 2 Oct 2020 17:16:11 +0200
+Subject: random32: Restore __latent_entropy attribute on net_rand_state
+
+From: Thibaut Sautereau <thibaut.sautereau@ssi.gouv.fr>
+
+[ Upstream commit 09a6b0bc3be793ca8cba580b7992d73e9f68f15d ]
+
+Commit f227e3ec3b5c ("random32: update the net random state on interrupt
+and activity") broke compilation and was temporarily fixed by Linus in
+83bdc7275e62 ("random32: remove net_rand_state from the latent entropy
+gcc plugin") by entirely moving net_rand_state out of the things handled
+by the latent_entropy GCC plugin.
+
+From what I understand when reading the plugin code, using the
+__latent_entropy attribute on a declaration was the wrong part and
+simply keeping the __latent_entropy attribute on the variable definition
+was the correct fix.
+
+Fixes: 83bdc7275e62 ("random32: remove net_rand_state from the latent entropy gcc plugin")
+Acked-by: Willy Tarreau <w@1wt.eu>
+Cc: Emese Revfy <re.emese@gmail.com>
+Signed-off-by: Thibaut Sautereau <thibaut.sautereau@ssi.gouv.fr>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ lib/random32.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/lib/random32.c b/lib/random32.c
+index 3d749abb9e80d..1786f78bf4c53 100644
+--- a/lib/random32.c
++++ b/lib/random32.c
+@@ -48,7 +48,7 @@ static inline void prandom_state_selftest(void)
+ }
+ #endif
+
+-DEFINE_PER_CPU(struct rnd_state, net_rand_state);
++DEFINE_PER_CPU(struct rnd_state, net_rand_state) __latent_entropy;
+
+ /**
+ * prandom_u32_state - seeded pseudo-random number generator.
+--
+2.25.1
+
--- /dev/null
+From 63a2bdf2bbaea2a84336423c0f705d72e96823b2 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sat, 19 Sep 2020 16:39:22 +0200
+Subject: scripts/dtc: only append to HOST_EXTRACFLAGS instead of overwriting
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
+
+[ Upstream commit efe84d408bf41975db8506d3a1cc02e794e2309c ]
+
+When building with
+
+ $ HOST_EXTRACFLAGS=-g make
+
+the expectation is that host tools are built with debug informations.
+This however doesn't happen if the Makefile assigns a new value to the
+HOST_EXTRACFLAGS instead of appending to it. So use += instead of := for
+the first assignment.
+
+Fixes: e3fd9b5384f3 ("scripts/dtc: consolidate include path options in Makefile")
+Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
+Signed-off-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ scripts/dtc/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
+index b5a5b1c548c9b..c2dac994896b4 100644
+--- a/scripts/dtc/Makefile
++++ b/scripts/dtc/Makefile
+@@ -9,7 +9,7 @@ dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o \
+ dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o
+
+ # Source files need to get at the userspace version of libfdt_env.h to compile
+-HOST_EXTRACFLAGS := -I $(srctree)/$(src)/libfdt
++HOST_EXTRACFLAGS += -I $(srctree)/$(src)/libfdt
+
+ ifeq ($(shell pkg-config --exists yaml-0.1 2>/dev/null && echo yes),)
+ ifneq ($(CHECK_DTBS),)
+--
+2.25.1
+
spi-fsl-espi-only-process-interrupts-for-expected-ev.patch
nvme-pci-fix-null-req-in-completion-handler.patch
nvme-fc-fail-new-connections-to-a-deleted-host-or-re.patch
+gpio-sprd-clear-interrupt-when-setting-the-type-as-e.patch
+phy-ti-am654-fix-a-leak-in-serdes_am654_probe.patch
+pinctrl-mvebu-fix-i2c-sda-definition-for-98dx3236.patch
+nfs-fix-security-label-length-not-being-reset.patch
+clk-tegra-always-program-pll_e-when-enabled.patch
+clk-samsung-exynos4-mark-chipid-clock-as-clk_ignore_.patch
+iommu-exynos-add-missing-put_device-call-in-exynos_i.patch
+gpio-aspeed-sgpio-enable-access-to-all-80-input-outp.patch
+gpio-aspeed-sgpio-don-t-enable-all-interrupts-by-def.patch
+gpio-aspeed-fix-ast2600-bank-properties.patch
+i2c-cpm-fix-i2c_ram-structure.patch
+input-trackpoint-enable-synaptics-trackpoints.patch
+scripts-dtc-only-append-to-host_extracflags-instead-.patch
+random32-restore-__latent_entropy-attribute-on-net_r.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
