6.1-stable patches

added patches:
	rust-remove-params-from-module-macro-example.patch
	x86-tdx-preserve-shared-bit-on-mprotect.patch

diff --git a/queue-6.1/rust-remove-params-from-module-macro-example.patch b/queue-6.1/rust-remove-params-from-module-macro-example.patch
new file mode 100644 (file)
index 0000000..7f10d8b
--- /dev/null
+++ b/queue-6.1/rust-remove-params-from-module-macro-example.patch
@@ -0,0 +1,46 @@
+From 19843452dca40e28d6d3f4793d998b681d505c7f Mon Sep 17 00:00:00 2001
+From: Aswin Unnikrishnan <aswinunni01@gmail.com>
+Date: Fri, 19 Apr 2024 21:50:13 +0000
+Subject: rust: remove `params` from `module` macro example
+
+From: Aswin Unnikrishnan <aswinunni01@gmail.com>
+
+commit 19843452dca40e28d6d3f4793d998b681d505c7f upstream.
+
+Remove argument `params` from the `module` macro example, because the
+macro does not currently support module parameters since it was not sent
+with the initial merge.
+
+Signed-off-by: Aswin Unnikrishnan <aswinunni01@gmail.com>
+Reviewed-by: Alice Ryhl <aliceryhl@google.com>
+Cc: stable@vger.kernel.org
+Fixes: 1fbde52bde73 ("rust: add `macros` crate")
+Link: https://lore.kernel.org/r/20240419215015.157258-1-aswinunni01@gmail.com
+[ Reworded slightly. ]
+Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ rust/macros/lib.rs |   12 ------------
+ 1 file changed, 12 deletions(-)
+
+--- a/rust/macros/lib.rs
++++ b/rust/macros/lib.rs
+@@ -27,18 +27,6 @@ use proc_macro::TokenStream;
+ ///     author: b"Rust for Linux Contributors",
+ ///     description: b"My very own kernel module!",
+ ///     license: b"GPL",
+-///     params: {
+-///        my_i32: i32 {
+-///            default: 42,
+-///            permissions: 0o000,
+-///            description: b"Example of i32",
+-///        },
+-///        writeable_i32: i32 {
+-///            default: 42,
+-///            permissions: 0o644,
+-///            description: b"Example of i32",
+-///        },
+-///    },
+ /// }
+ ///
+ /// struct MyModule;

diff --git a/queue-6.1/series b/queue-6.1/series
index b7c38f234150f418c454690655bbbe3b0497b0be..b82eedd9d19ea55d0907a81596e6007ab9a90fcc 100644 (file)
--- a/queue-6.1/series
+++ b/queue-6.1/series
@@ -87,3 +87,5 @@ stackdepot-respect-__gfp_nolockdep-allocation-flag.patch
 fbdev-fix-incorrect-address-computation-in-deferred-io.patch
 udp-preserve-the-connected-status-if-only-udp-cmsg.patch
 mtd-diskonchip-work-around-ubsan-link-failure.patch
+rust-remove-params-from-module-macro-example.patch
+x86-tdx-preserve-shared-bit-on-mprotect.patch

diff --git a/queue-6.1/x86-tdx-preserve-shared-bit-on-mprotect.patch b/queue-6.1/x86-tdx-preserve-shared-bit-on-mprotect.patch
new file mode 100644 (file)
index 0000000..f704120
--- /dev/null
+++ b/queue-6.1/x86-tdx-preserve-shared-bit-on-mprotect.patch
@@ -0,0 +1,80 @@
+From a0a8d15a798be4b8f20aca2ba91bf6b688c6a640 Mon Sep 17 00:00:00 2001
+From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
+Date: Wed, 24 Apr 2024 11:20:35 +0300
+Subject: x86/tdx: Preserve shared bit on mprotect()
+
+From: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
+
+commit a0a8d15a798be4b8f20aca2ba91bf6b688c6a640 upstream.
+
+The TDX guest platform takes one bit from the physical address to
+indicate if the page is shared (accessible by VMM). This bit is not part
+of the physical_mask and is not preserved during mprotect(). As a
+result, the 'shared' bit is lost during mprotect() on shared mappings.
+
+_COMMON_PAGE_CHG_MASK specifies which PTE bits need to be preserved
+during modification. AMD includes 'sme_me_mask' in the define to
+preserve the 'encrypt' bit.
+
+To cover both Intel and AMD cases, include 'cc_mask' in
+_COMMON_PAGE_CHG_MASK instead of 'sme_me_mask'.
+
+Reported-and-tested-by: Chris Oo <cho@microsoft.com>
+
+Fixes: 41394e33f3a0 ("x86/tdx: Extend the confidential computing API to support TDX guests")
+Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
+Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
+Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
+Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
+Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/all/20240424082035.4092071-1-kirill.shutemov%40linux.intel.com
+Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/include/asm/coco.h          |    5 ++++-
+ arch/x86/include/asm/pgtable_types.h |    3 ++-
+ 2 files changed, 6 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/include/asm/coco.h
++++ b/arch/x86/include/asm/coco.h
+@@ -13,9 +13,10 @@ enum cc_vendor {
+ };
+ 
+ extern enum cc_vendor cc_vendor;
+-extern u64 cc_mask;
+ 
+ #ifdef CONFIG_ARCH_HAS_CC_PLATFORM
++extern u64 cc_mask;
++
+ static inline void cc_set_mask(u64 mask)
+ {
+       RIP_REL_REF(cc_mask) = mask;
+@@ -25,6 +26,8 @@ u64 cc_mkenc(u64 val);
+ u64 cc_mkdec(u64 val);
+ void cc_random_init(void);
+ #else
++static const u64 cc_mask = 0;
++
+ static inline u64 cc_mkenc(u64 val)
+ {
+       return val;
+--- a/arch/x86/include/asm/pgtable_types.h
++++ b/arch/x86/include/asm/pgtable_types.h
+@@ -127,7 +127,7 @@
+  */
+ #define _COMMON_PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |        \
+                                _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY |\
+-                               _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC | \
++                               _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_CC | \
+                                _PAGE_UFFD_WP)
+ #define _PAGE_CHG_MASK        (_COMMON_PAGE_CHG_MASK | _PAGE_PAT)
+ #define _HPAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_PAT_LARGE)
+@@ -153,6 +153,7 @@ enum page_cache_mode {
+ };
+ #endif
+ 
++#define _PAGE_CC              (_AT(pteval_t, cc_mask))
+ #define _PAGE_ENC             (_AT(pteval_t, sme_me_mask))
+ 
+ #define _PAGE_CACHE_MASK      (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)