arm64: dts: rockchip: Add DSI for RK3368

Add the Designware MIPI DSI controller and it's port nodes.

Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
[removed endpoint address, as there is only one vop leading to DSI]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 60e982a3db0d5a94fdd141e9b61b38e3db78f982..8f02162032416c6e56e8ebe6b047dd5acc3002d1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -869,6 +869,11 @@
                vop_out: port {
                        #address-cells = <1>;
                        #size-cells = <0>;
+
+                       vop_out_dsi: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&dsi_in_vop>;
+                       };
                };
        };
 
@@ -883,6 +888,38 @@
                status = "disabled";
        };
 
+       mipi_dsi: dsi@ff960000 {
+               compatible = "rockchip,rk3368-mipi-dsi", "snps,dw-mipi-dsi";
+               reg = <0x0 0xff960000 0x0 0x4000>;
+               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru PCLK_MIPI_DSI0>;
+               clock-names = "pclk";
+               phys = <&dphy>;
+               phy-names = "dphy";
+               resets = <&cru SRST_MIPIDSI0>;
+               reset-names = "apb";
+               rockchip,grf = <&grf>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       mipi_in: port@0 {
+                               reg = <0>;
+
+                               dsi_in_vop: endpoint {
+                                       remote-endpoint = <&vop_out_dsi>;
+                               };
+                       };
+
+                       mipi_out: port@1 {
+                               reg = <1>;
+                       };
+
+               };
+       };
+
        dphy: phy@ff968000 {
                compatible = "rockchip,rk3368-dsi-dphy";
                reg = <0x0 0xff968000 0x0 0x4000>;