drm/panthor: Let IRQ handlers clear the interrupts themselves

MMU handler needs to be in control of the job interrupt clears because
clearing the interrupt also unblocks the writer/reader that triggered
the fault, and we don't want it to be unblocked until we've had a chance
to process the IRQ.

Since clearing the clearing is just one line, let's make it explicit
instead of doing it in the generic code path.

Note that this commit changes the existing behavior in that the MMU
COMPLETED irqs are no longer cleared, which is fine because they are
masked, so we're not risking an interrupt flood.

Changes in v3:
- Mention the fact we no longer clear MMU COMPLETED irqs
- Add Liviu's R-b

Changes in v2:
- Move the MMU_INT_CLEAR around

Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Link: https://lore.kernel.org/r/20250404080933.2912674-5-boris.brezillon@collabora.com
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>

diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
index da6574021664ba2b4350ab1a595c18ac7f5be8e6..4c27b6d85f4616c1f6fdb80030bd85c7d6a716f5 100644 (file)
--- a/drivers/gpu/drm/panthor/panthor_device.h
+++ b/drivers/gpu/drm/panthor/panthor_device.h
@@ -383,8 +383,6 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da
                if (!status)                                                                    \
                        break;                                                                  \
                                                                                                \
-               gpu_write(ptdev, __reg_prefix ## _INT_CLEAR, status);                           \
-                                                                                               \
                __handler(ptdev, status);                                                       \
                ret = IRQ_HANDLED;                                                              \
        }                                                                                       \

diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
index 0f52766a31205859c97c575e37a6c2a83124dff3..446bb377b953dbd2b23c170a3a59189b3ad3deb3 100644 (file)
--- a/drivers/gpu/drm/panthor/panthor_fw.c
+++ b/drivers/gpu/drm/panthor/panthor_fw.c
@@ -1008,6 +1008,8 @@ static void panthor_fw_init_global_iface(struct panthor_device *ptdev)
 
 static void panthor_job_irq_handler(struct panthor_device *ptdev, u32 status)
 {
+       gpu_write(ptdev, JOB_INT_CLEAR, status);
+
        if (!ptdev->fw->booted && (status & JOB_INT_GLOBAL_IF))
                ptdev->fw->booted = true;
 

diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c
index 671049020afaa21fb5b5a76fddadf81fe3a704b5..32d678a0114ea34963e38173ebf7e4f2f7a1910b 100644 (file)
--- a/drivers/gpu/drm/panthor/panthor_gpu.c
+++ b/drivers/gpu/drm/panthor/panthor_gpu.c
@@ -150,6 +150,8 @@ static void panthor_gpu_init_info(struct panthor_device *ptdev)
 
 static void panthor_gpu_irq_handler(struct panthor_device *ptdev, u32 status)
 {
+       gpu_write(ptdev, GPU_INT_CLEAR, status);
+
        if (status & GPU_IRQ_FAULT) {
                u32 fault_status = gpu_read(ptdev, GPU_FAULT_STATUS);
                u64 address = ((u64)gpu_read(ptdev, GPU_FAULT_ADDR_HI) << 32) |

diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
index 7cca97d298ea10768c31a6842c29c7b74ff1f9b3..0ba76982d45b657238074ae6690fe41b3e0a8fb5 100644 (file)
--- a/drivers/gpu/drm/panthor/panthor_mmu.c
+++ b/drivers/gpu/drm/panthor/panthor_mmu.c
@@ -1710,6 +1710,13 @@ static void panthor_mmu_irq_handler(struct panthor_device *ptdev, u32 status)
                        access_type, access_type_name(ptdev, fault_status),
                        source_id);
 
+               /* We don't handle VM faults at the moment, so let's just clear the
+                * interrupt and let the writer/reader crash.
+                * Note that COMPLETED irqs are never cleared, but this is fine
+                * because they are always masked.
+                */
+               gpu_write(ptdev, MMU_INT_CLEAR, mask);
+
                /* Ignore MMU interrupts on this AS until it's been
                 * re-enabled.
                 */