Add blobs for test_acpi_aarch64_virt_tcg_its_off(), which introduces a
new variant, .its_off, that requires variations of the MADT and IORT
tables.
MADT (aka APIC) diff:
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length :
000000B8
+[008h 0008 1] Revision : 04
+[009h 0009 1] Checksum : C1
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision :
00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision :
00000001
+
+[024h 0036 4] Local Apic Address :
00000000
+[028h 0040 4] Flags (decoded below) :
00000000
+ PC-AT Compatibility : 0
+
+[02Ch 0044 1] Subtable Type : 0C [Generic Interrupt Distributor]
+[02Dh 0045 1] Length : 18
+[02Eh 0046 2] Reserved : 0000
+[030h 0048 4] Local GIC Hardware ID :
00000000
+[034h 0052 8] Base Address :
0000000008000000
+[03Ch 0060 4] Interrupt Base :
00000000
+[040h 0064 1] Version : 03
+[041h 0065 3] Reserved : 000000
+
+[044h 0068 1] Subtable Type : 0B [Generic Interrupt Controller]
+[045h 0069 1] Length : 50
+[046h 0070 2] Reserved : 0000
+[048h 0072 4] CPU Interface Number :
00000000
+[04Ch 0076 4] Processor UID :
00000000
+[050h 0080 4] Flags (decoded below) :
00000001
+ Processor Enabled : 1
+ Performance Interrupt Trigger Mode : 0
+ Virtual GIC Interrupt Trigger Mode : 0
+[054h 0084 4] Parking Protocol Version :
00000000
+[058h 0088 4] Performance Interrupt :
00000017
+[05Ch 0092 8] Parked Address :
0000000000000000
+[064h 0100 8] Base Address :
0000000000000000
+[06Ch 0108 8] Virtual GIC Base Address :
0000000000000000
+[074h 0116 8] Hypervisor GIC Base Address :
0000000000000000
+[07Ch 0124 4] Virtual GIC Interrupt :
00000000
+[080h 0128 8] Redistributor Base Address :
0000000000000000
+[088h 0136 8] ARM MPIDR :
0000000000000000
+[090h 0144 1] Efficiency Class : 00
+[091h 0145 1] Reserved : 00
+[092h 0146 2] SPE Overflow Interrupt : 0000
+
+[094h 0148 1] Subtable Type : 0E [Generic Interrupt Redistributor]
+[095h 0149 1] Length : 10
+[096h 0150 2] Reserved : 0000
+[098h 0152 8] Base Address :
00000000080A0000
+[0A0h 0160 4] Length :
00F60000
+
+[0A4h 0164 1] Subtable Type : 0F [Generic Interrupt Translator]
+[0A5h 0165 1] Length : 14
+[0A6h 0166 2] Reserved : 0000
+[0A8h 0168 4] Translation ID :
00000000
+[0ACh 0172 8] Base Address :
0000000008080000
+[0B4h 0180 4] Reserved :
00000000
IORT diff:
+[000h 0000 4] Signature : "IORT" [IO Remapping Table]
+[004h 0004 4] Table Length :
000000EC
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 57
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision :
00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision :
00000001
+
+[024h 0036 4] Node Count :
00000003
+[028h 0040 4] Node Offset :
00000030
+[02Ch 0044 4] Reserved :
00000000
+
+[030h 0048 1] Type : 00
+[031h 0049 2] Length : 0018
+[033h 0051 1] Revision : 01
+[034h 0052 4] Reserved :
00000000
+[038h 0056 4] Mapping Count :
00000000
+[03Ch 0060 4] Mapping Offset :
00000000
+
+[040h 0064 4] ItsCount :
00000001
+[044h 0068 4] Identifiers :
00000000
+
+[048h 0072 1] Type : 04
+[049h 0073 2] Length : 0058
+[04Bh 0075 1] Revision : 04
+[04Ch 0076 4] Reserved :
00000001
+[050h 0080 4] Mapping Count :
00000001
+[054h 0084 4] Mapping Offset :
00000044
+
+[058h 0088 8] Base Address :
0000000009050000
+[060h 0096 4] Flags (decoded below) :
00000001
+ COHACC Override : 1
+ HTTU Override : 0
+ Proximity Domain Valid : 0
+[064h 0100 4] Reserved :
00000000
+[068h 0104 8] VATOS Address :
0000000000000000
+[070h 0112 4] Model :
00000000
+[074h 0116 4] Event GSIV :
0000006A
+[078h 0120 4] PRI GSIV :
0000006B
+[07Ch 0124 4] GERR GSIV :
0000006D
+[080h 0128 4] Sync GSIV :
0000006C
+[084h 0132 4] Proximity Domain :
00000000
+[088h 0136 4] Device ID Mapping Index :
00000000
+
+[08Ch 0140 4] Input base :
00000000
+[090h 0144 4] ID Count :
0000FFFF
+[094h 0148 4] Output Base :
00000000
+[098h 0152 4] Output Reference :
00000030
+[09Ch 0156 4] Flags (decoded below) :
00000000
+ Single Mapping : 0
+
+[0A0h 0160 1] Type : 02
+[0A1h 0161 2] Length : 004C
+[0A3h 0163 1] Revision : 03
+[0A4h 0164 4] Reserved :
00000002
+[0A8h 0168 4] Mapping Count :
00000002
+[0ACh 0172 4] Mapping Offset :
00000024
+
+[0B0h 0176 8] Memory Properties : [IORT Memory Access Properties]
+[0B0h 0176 4] Cache Coherency :
00000001
+[0B4h 0180 1] Hints (decoded below) : 00
+ Transient : 0
+ Write Allocate : 0
+ Read Allocate : 0
+ Override : 0
+[0B5h 0181 2] Reserved : 0000
+[0B7h 0183 1] Memory Flags (decoded below) : 03
+ Coherency : 1
+ Device Attribute : 1
+[0B8h 0184 4] ATS Attribute :
00000000
+[0BCh 0188 4] PCI Segment Number :
00000000
+[0C0h 0192 1] Memory Size Limit : 40
+[0C1h 0193 3] Reserved : 000000
+
+[0C4h 0196 4] Input base :
00000000
+[0C8h 0200 4] ID Count :
000000FF
+[0CCh 0204 4] Output Base :
00000000
+[0D0h 0208 4] Output Reference :
00000048
+[0D4h 0212 4] Flags (decoded below) :
00000000
+ Single Mapping : 0
+
+[0D8h 0216 4] Input base :
00000100
+[0DCh 0220 4] ID Count :
0000FEFF
+[0E0h 0224 4] Output Base :
00000100
+[0E4h 0228 4] Output Reference :
00000030
+[0E8h 0232 4] Flags (decoded below) :
00000000
+ Single Mapping : 0
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id:
20250628195722.977078-8-gustavo.romero@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>