5.10-stable patches

added patches:
	drm-amdgpu-handle-polaris10-11-overlap-asics-v2.patch
	drm-amdgpu-make-display-pinning-more-flexible-v2.patch

diff --git a/queue-5.10/drm-amdgpu-handle-polaris10-11-overlap-asics-v2.patch b/queue-5.10/drm-amdgpu-handle-polaris10-11-overlap-asics-v2.patch
new file mode 100644 (file)
index 0000000..2908071
--- /dev/null
+++ b/queue-5.10/drm-amdgpu-handle-polaris10-11-overlap-asics-v2.patch
@@ -0,0 +1,55 @@
+From 1d4624cd72b912b2680c08d0be48338a1629a858 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 21 Nov 2022 15:52:19 -0500
+Subject: drm/amdgpu: handle polaris10/11 overlap asics (v2)
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 1d4624cd72b912b2680c08d0be48338a1629a858 upstream.
+
+Some special polaris 10 chips overlap with the polaris11
+DID range.  Handle this properly in the driver.
+
+v2: use local flags for other function calls.
+
+Acked-by: Luben Tuikov <luben.tuikov@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |   13 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+@@ -1121,6 +1121,15 @@ static int amdgpu_pci_probe(struct pci_d
+                        "See modparam exp_hw_support\n");
+               return -ENODEV;
+       }
++      /* differentiate between P10 and P11 asics with the same DID */
++      if (pdev->device == 0x67FF &&
++          (pdev->revision == 0xE3 ||
++           pdev->revision == 0xE7 ||
++           pdev->revision == 0xF3 ||
++           pdev->revision == 0xF7)) {
++              flags &= ~AMD_ASIC_MASK;
++              flags |= CHIP_POLARIS10;
++      }
+ 
+       /* Due to hardware bugs, S/G Display on raven requires a 1:1 IOMMU mapping,
+        * however, SME requires an indirect IOMMU mapping because the encryption
+@@ -1190,12 +1199,12 @@ static int amdgpu_pci_probe(struct pci_d
+       ddev->pdev = pdev;
+       pci_set_drvdata(pdev, ddev);
+ 
+-      ret = amdgpu_driver_load_kms(adev, ent->driver_data);
++      ret = amdgpu_driver_load_kms(adev, flags);
+       if (ret)
+               goto err_pci;
+ 
+ retry_init:
+-      ret = drm_dev_register(ddev, ent->driver_data);
++      ret = drm_dev_register(ddev, flags);
+       if (ret == -EAGAIN && ++retry <= 3) {
+               DRM_INFO("retry init %d\n", retry);
+               /* Don't request EX mode too frequently which is attacking */

diff --git a/queue-5.10/drm-amdgpu-make-display-pinning-more-flexible-v2.patch b/queue-5.10/drm-amdgpu-make-display-pinning-more-flexible-v2.patch
new file mode 100644 (file)
index 0000000..efa7029
--- /dev/null
+++ b/queue-5.10/drm-amdgpu-make-display-pinning-more-flexible-v2.patch
@@ -0,0 +1,42 @@
+From 81d0bcf9900932633d270d5bc4a54ff599c6ebdb Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 7 Dec 2022 11:08:53 -0500
+Subject: drm/amdgpu: make display pinning more flexible (v2)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 81d0bcf9900932633d270d5bc4a54ff599c6ebdb upstream.
+
+Only apply the static threshold for Stoney and Carrizo.
+This hardware has certain requirements that don't allow
+mixing of GTT and VRAM.  Newer asics do not have these
+requirements so we should be able to be more flexible
+with where buffers end up.
+
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2270
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2291
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2255
+Acked-by: Luben Tuikov <luben.tuikov@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |    3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -1531,7 +1531,8 @@ u64 amdgpu_bo_gpu_offset_no_check(struct
+ uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
+                                           uint32_t domain)
+ {
+-      if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
++      if ((domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) &&
++          ((adev->asic_type == CHIP_CARRIZO) || (adev->asic_type == CHIP_STONEY))) {
+               domain = AMDGPU_GEM_DOMAIN_VRAM;
+               if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
+                       domain = AMDGPU_GEM_DOMAIN_GTT;

diff --git a/queue-5.10/series b/queue-5.10/series
index 2235984989903a57c44535814bb0394d33a854f9..802b3f5250915e8f5feae89333dfcb2a5df81336 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -686,3 +686,5 @@ ext4-fix-inode-leak-in-ext4_xattr_inode_create-on-an-error-path.patch
 ext4-initialize-quota-before-expanding-inode-in-setproject-ioctl.patch
 ext4-avoid-unaccounted-block-allocation-when-expanding-inode.patch
 ext4-allocate-extended-attribute-value-in-vmalloc-area.patch
+drm-amdgpu-handle-polaris10-11-overlap-asics-v2.patch
+drm-amdgpu-make-display-pinning-more-flexible-v2.patch