drop queue-5.10/perf-regs-x86-fix-arch__intr_reg_mask-for-the-hybrid.patch

diff --git a/queue-5.10/perf-regs-x86-fix-arch__intr_reg_mask-for-the-hybrid.patch b/queue-5.10/perf-regs-x86-fix-arch__intr_reg_mask-for-the-hybrid.patch
deleted file mode 100644 (file)
index 948d810..0000000
--- a/queue-5.10/perf-regs-x86-fix-arch__intr_reg_mask-for-the-hybrid.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 10bf5d52d5249495c5699560235c43dd5341c114 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 18 May 2022 07:51:25 -0700
-Subject: perf regs x86: Fix arch__intr_reg_mask() for the hybrid platform
-
-From: Kan Liang <kan.liang@linux.intel.com>
-
-[ Upstream commit 01b28e4a58152e8906eeb5f1b55a0c404c48c7c8 ]
-
-The X86 specific arch__intr_reg_mask() is to check whether the kernel
-and hardware can collect XMM registers. But it doesn't work on some
-hybrid platform.
-
-Without the patch on ADL-N:
-
-  $ perf record -I?
-  available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10
-  R11 R12 R13 R14 R15
-
-The config of the test event doesn't contain the PMU information. The
-kernel may fail to initialize it on the correct hybrid PMU and return
-the wrong non-supported information.
-
-Add the PMU information into the config for the hybrid platform. The
-same register set is supported among different hybrid PMUs. Checking
-the first available one is good enough.
-
-With the patch on ADL-N:
-
-  $ perf record -I?
-  available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10
-  R11 R12 R13 R14 R15 XMM0 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 XMM9
-  XMM10 XMM11 XMM12 XMM13 XMM14 XMM15
-
-Fixes: 6466ec14aaf44ff1 ("perf regs x86: Add X86 specific arch__intr_reg_mask()")
-Reported-by: Ammy Yi <ammy.yi@intel.com>
-Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
-Acked-by: Ian Rogers <irogers@google.com>
-Cc: Ingo Molnar <mingo@redhat.com>
-Cc: Jiri Olsa <jolsa@kernel.org>
-Cc: Kan Liang <kan.liang@linux.intel.com>
-Cc: Namhyung Kim <namhyung@kernel.org>
-Cc: Peter Zijlstra <peterz@infradead.org>
-Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
-Link: https://lore.kernel.org/r/20220518145125.1494156-1-kan.liang@linux.intel.com
-Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- tools/perf/arch/x86/util/perf_regs.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c
-index fca81b39b09f..c46e2920e460 100644
---- a/tools/perf/arch/x86/util/perf_regs.c
-+++ b/tools/perf/arch/x86/util/perf_regs.c
-@@ -9,6 +9,8 @@
- #include "../../../util/perf_regs.h"
- #include "../../../util/debug.h"
- #include "../../../util/event.h"
-+#include "../../../util/pmu.h"
-+#include "../../../util/pmu-hybrid.h"
- 
- const struct sample_reg sample_reg_masks[] = {
-       SMPL_REG(AX, PERF_REG_X86_AX),
-@@ -284,12 +286,22 @@ uint64_t arch__intr_reg_mask(void)
-               .disabled               = 1,
-               .exclude_kernel         = 1,
-       };
-+      struct perf_pmu *pmu;
-       int fd;
-       /*
-        * In an unnamed union, init it here to build on older gcc versions
-        */
-       attr.sample_period = 1;
- 
-+      if (perf_pmu__has_hybrid()) {
-+              /*
-+               * The same register set is supported among different hybrid PMUs.
-+               * Only check the first available one.
-+               */
-+              pmu = list_first_entry(&perf_pmu__hybrid_pmus, typeof(*pmu), hybrid_list);
-+              attr.config |= (__u64)pmu->type << PERF_PMU_TYPE_SHIFT;
-+      }
-+
-       event_attr_init(&attr);
- 
-       fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
--- 
-2.35.1
-

diff --git a/queue-5.10/series b/queue-5.10/series
index 81b048bf06db860906fe1e3e98680a92bdf6f09d..8e67eab6a08a9acb3917b5d665f761aa1cad2d2d 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -74,7 +74,6 @@ net-bridge-clear-offload_fwd_mark-when-passing-frame.patch
 riscv-dts-sifive-fu540-c000-align-dma-node-name-with.patch
 gpio-gpio-vf610-do-not-touch-other-bits-when-set-the.patch
 gpio-mvebu-pwm-refuse-requests-with-inverted-polarit.patch
-perf-regs-x86-fix-arch__intr_reg_mask-for-the-hybrid.patch
 perf-bench-numa-address-compiler-error-on-s390.patch
 scsi-qla2xxx-fix-missed-dma-unmap-for-aborted-comman.patch
 mac80211-fix-rx-reordering-with-non-explicit-psmp-ac.patch