x86: support APX forms of U{RD,WR}MSR

This was missed in 6177c84d5edc ("Support APX GPR32 with extend evex
prefix").

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 455e5a30fd937563259cc7f2250c34ddd231a23c..4262e1ec5d89dbbc26e602abb846beaba5aa0f00 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1950,7 +1950,7 @@ cpu_flags_match (const insn_template *t)
          && (any.bitfield.cpubmi || any.bitfield.cpubmi2
              || any.bitfield.cpuavx512f || any.bitfield.cpuavx512bw
              || any.bitfield.cpuavx512dq || any.bitfield.cpuamx_tile
-             || any.bitfield.cpucmpccxadd))
+             || any.bitfield.cpucmpccxadd || any.bitfield.cpuuser_msr))
        {
          /* These checks (verifying that APX_F() was properly used in the
             opcode table entry) make sure there's no need for an "else" to
@@ -3752,7 +3752,7 @@ install_template (const insn_template *t)
       if ((maybe_cpu (t, CpuCMPCCXADD) || maybe_cpu (t, CpuAMX_TILE)
           || maybe_cpu (t, CpuAVX512F) || maybe_cpu (t, CpuAVX512DQ)
           || maybe_cpu (t, CpuAVX512BW) || maybe_cpu (t, CpuBMI)
-          || maybe_cpu (t, CpuBMI2))
+          || maybe_cpu (t, CpuBMI2) || maybe_cpu (t, CpuUSER_MSR))
          && maybe_cpu (t, CpuAPX_F))
        {
          if (need_evex_encoding (t))
@@ -4070,7 +4070,7 @@ build_evex_prefix (void)
   /* The high 3 bits of the second EVEX byte are 1's compliment of RXB
      bits from REX.  */
   gas_assert (i.tm.opcode_space >= SPACE_0F);
-  gas_assert (i.tm.opcode_space <= SPACE_EVEXMAP6);
+  gas_assert (i.tm.opcode_space <= SPACE_VEXMAP7);
   i.vex.bytes[1] = ((~i.rex & 7) << 5)
                   | (!dot_insn () ? i.tm.opcode_space
                                   : i.insn_opcode_space);

diff --git a/gas/testsuite/gas/i386/x86-64-user_msr-intel.d b/gas/testsuite/gas/i386/x86-64-user_msr-intel.d
index e68b5eacfa9fc977184d7e606b78e17b7dabf842..ba7e30ea523e262cd8d1a9145d41723fcea13572 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-user_msr-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-user_msr-intel.d
@@ -10,22 +10,28 @@ Disassembly of section \.text:
 0+ <_start>:
 \s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr r12,r14
 \s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr rax,r14
+\s*[a-f0-9]+:\s*62 64 7f 08 f8 c0\s+urdmsr rax,r24
 \s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr r12,rdx
+\s*[a-f0-9]+:\s*62 fc 7f 08 f8 d6\s+urdmsr r22,rdx
 \s*[a-f0-9]+:\s*f2 0f 38 f8 d0\s+urdmsr rax,rdx
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 0f 0f 12 03\s+urdmsr r12,0x3120f0f
 \s*[a-f0-9]+:\s*c4 e7 7b f8 c0 0f 0f 12 03\s+urdmsr rax,0x3120f0f
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 7f 00 00 00\s+urdmsr r12,0x7f
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 ff 7f 00 00\s+urdmsr r12,0x7fff
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 00 00 00 80\s+urdmsr r12,0x80000000
+\s*[a-f0-9]+:\s*62 ff 7f 08 f8 c6 00 00 00 80\s+urdmsr r22,0x80000000
 \s*[a-f0-9]+:\s*f3 45 0f 38 f8 f4\s+uwrmsr r14,r12
 \s*[a-f0-9]+:\s*f3 44 0f 38 f8 f0\s+uwrmsr r14,rax
+\s*[a-f0-9]+:\s*62 64 7e 08 f8 c0\s+uwrmsr r24,rax
 \s*[a-f0-9]+:\s*f3 41 0f 38 f8 d4\s+uwrmsr rdx,r12
+\s*[a-f0-9]+:\s*62 fc 7e 08 f8 d6\s+uwrmsr rdx,r22
 \s*[a-f0-9]+:\s*f3 0f 38 f8 d0\s+uwrmsr rdx,rax
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 0f 0f 12 03\s+uwrmsr 0x3120f0f,r12
 \s*[a-f0-9]+:\s*c4 e7 7a f8 c0 0f 0f 12 03\s+uwrmsr 0x3120f0f,rax
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr 0x7f,r12
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr 0x7fff,r12
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr 0x80000000,r12
+\s*[a-f0-9]+:\s*62 ff 7e 08 f8 c6 00 00 00 80\s+uwrmsr 0x80000000,r22
 \s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr r12,r14
 \s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr rax,r14
 \s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr r12,rdx
@@ -44,3 +50,4 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr 0x7f,r12
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr 0x7fff,r12
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr 0x80000000,r12
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-user_msr.d b/gas/testsuite/gas/i386/x86-64-user_msr.d
index 41f29718ab062ddab99236e1217ecc07ba17e93f..9cf98489015dc0eb4745f9add9236b781f1c4afa 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-user_msr.d
+++ b/gas/testsuite/gas/i386/x86-64-user_msr.d
@@ -10,22 +10,28 @@ Disassembly of section \.text:
 0+ <_start>:
 \s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr %r14,%r12
 \s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr %r14,%rax
+\s*[a-f0-9]+:\s*62 64 7f 08 f8 c0\s+urdmsr %r24,%rax
 \s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr %rdx,%r12
+\s*[a-f0-9]+:\s*62 fc 7f 08 f8 d6\s+urdmsr %rdx,%r22
 \s*[a-f0-9]+:\s*f2 0f 38 f8 d0\s+urdmsr %rdx,%rax
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 0f 0f 12 03\s+urdmsr \$0x3120f0f,%r12
 \s*[a-f0-9]+:\s*c4 e7 7b f8 c0 0f 0f 12 03\s+urdmsr \$0x3120f0f,%rax
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 7f 00 00 00\s+urdmsr \$0x7f,%r12
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 ff 7f 00 00\s+urdmsr \$0x7fff,%r12
 \s*[a-f0-9]+:\s*c4 c7 7b f8 c4 00 00 00 80\s+urdmsr \$0x80000000,%r12
+\s*[a-f0-9]+:\s*62 ff 7f 08 f8 c6 00 00 00 80\s+urdmsr \$0x80000000,%r22
 \s*[a-f0-9]+:\s*f3 45 0f 38 f8 f4\s+uwrmsr %r12,%r14
 \s*[a-f0-9]+:\s*f3 44 0f 38 f8 f0\s+uwrmsr %rax,%r14
+\s*[a-f0-9]+:\s*62 64 7e 08 f8 c0\s+uwrmsr %rax,%r24
 \s*[a-f0-9]+:\s*f3 41 0f 38 f8 d4\s+uwrmsr %r12,%rdx
+\s*[a-f0-9]+:\s*62 fc 7e 08 f8 d6\s+uwrmsr %r22,%rdx
 \s*[a-f0-9]+:\s*f3 0f 38 f8 d0\s+uwrmsr %rax,%rdx
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 0f 0f 12 03\s+uwrmsr %r12,\$0x3120f0f
 \s*[a-f0-9]+:\s*c4 e7 7a f8 c0 0f 0f 12 03\s+uwrmsr %rax,\$0x3120f0f
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr %r12,\$0x7f
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr %r12,\$0x7fff
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr %r12,\$0x80000000
+\s*[a-f0-9]+:\s*62 ff 7e 08 f8 c6 00 00 00 80\s+uwrmsr %r22,\$0x80000000
 \s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr %r14,%r12
 \s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr %r14,%rax
 \s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr %rdx,%r12
@@ -44,3 +50,4 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr %r12,\$0x7f
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr %r12,\$0x7fff
 \s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr %r12,\$0x80000000
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-user_msr.s b/gas/testsuite/gas/i386/x86-64-user_msr.s
index 63bc6c1352c2ea14f8736c4f5f4a97631df3f5e2..56e0ba2a988c04448480293e3af40af4da52a067 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-user_msr.s
+++ b/gas/testsuite/gas/i386/x86-64-user_msr.s
@@ -4,22 +4,28 @@
 _start:
        urdmsr  %r14, %r12
        urdmsr  %r14, %rax
+       urdmsr  %r24, %rax
        urdmsr  %rdx, %r12
+       urdmsr  %rdx, %r22
        urdmsr  %rdx, %rax
        urdmsr  $51515151, %r12
        urdmsr  $51515151, %rax
        urdmsr  $0x7f, %r12
        urdmsr  $0x7fff, %r12
        urdmsr  $0x80000000, %r12
+       urdmsr  $0x80000000, %r22
        uwrmsr  %r12, %r14
        uwrmsr  %rax, %r14
+       uwrmsr  %rax, %r24
        uwrmsr  %r12, %rdx
+       uwrmsr  %r22, %rdx
        uwrmsr  %rax, %rdx
        uwrmsr  %r12, $51515151
        uwrmsr  %rax, $51515151
        uwrmsr  %r12, $0x7f
        uwrmsr  %r12, $0x7fff
        uwrmsr  %r12, $0x80000000
+       uwrmsr  %r22, $0x80000000
 
        .intel_syntax noprefix
        urdmsr  r12, r14

diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
index f9f912c50942d4dfa1cbedb112d036586d4a26a4..e793b24a6f836fb5be725471b860df27b1412cb2 100644 (file)
--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -1 +1,10 @@
-/* Nothing at present.  */
+  /* MOD_EVEX_MAP4_F8_P1 */
+  {
+    { "enqcmds",       { Gva, M }, 0 },
+    { "uwrmsr",                { Gq, Eq }, 0 },
+  },
+  /* MOD_EVEX_MAP4_F8_P3 */
+  {
+    { "enqcmd",                { Gva, M }, 0 },
+    { "urdmsr",                { Eq, Gq }, 0 },
+  },

diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 54ed48c6952998cea49e64340f354b193429b71e..37e64607ae677a8669fa44bc027eb4de07eaf080 100644 (file)
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -392,9 +392,9 @@
   /* PREFIX_EVEX_MAP4_F8 */
   {
     { Bad_Opcode },
-    { "enqcmds", { Gva, M },  0 },
+    { MOD_TABLE (MOD_EVEX_MAP4_F8_P_1) },
     { "movdir64b", { Gva, M }, 0 },
-    { "enqcmd", { Gva, M }, 0 },
+    { MOD_TABLE (MOD_EVEX_MAP4_F8_P_3) },
   },
   /* PREFIX_EVEX_MAP5_10 */
   {

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 7edae20c323f77e9f903992a20f695000884a46b..f2c7959614625c94b8dd053720be51612bf0bf44 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -950,6 +950,9 @@ enum
   MOD_0F38F8,
 
   MOD_VEX_0F3849_X86_64_L_0_W_0,
+
+  MOD_EVEX_MAP4_F8_P_1,
+  MOD_EVEX_MAP4_F8_P_3,
 };
 
 enum
@@ -1356,6 +1359,7 @@ enum
   EVEX_MAP4,
   EVEX_MAP5,
   EVEX_MAP6,
+  EVEX_MAP7,
 };
 
 enum
@@ -9090,6 +9094,9 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
        case 0x6:
          vex_table_index = EVEX_MAP6;
          break;
+       case 0x7:
+         vex_table_index = EVEX_MAP7;
+         break;
        }
 
       /* The second byte after 0x62.  */
@@ -9159,7 +9166,12 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
 
       ins->codep++;
       vindex = *ins->codep++;
-      dp = &evex_table[vex_table_index][vindex];
+      if (vex_table_index != EVEX_MAP7)
+       dp = &evex_table[vex_table_index][vindex];
+      else if (vindex == 0xf8)
+       dp = &map7_f8_opcode;
+      else
+       dp = &bad_opcode;
       ins->end_codep = ins->codep;
       if (!fetch_modrm (ins))
        return &err_opcode;

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index c3f6443d089d8c42c07682196efedc88a1519ae4..f2efc7c383842317545aebfd2eb622dace515151 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3482,11 +3482,13 @@ eretu, 0xf30f01ca, FRED, NoSuf, {}
 // USER_MSR instructions.
 
 urdmsr, 0xf20f38f8, USER_MSR, RegMem|NoSuf|NoRex64, { Reg64, Reg64 }
-urdmsr, 0xf2f8/0, USER_MSR, Modrm|Vex128|VexMap7|VexW0|NoSuf, { Imm32, Reg64 }
+urdmsr, 0xf2f8, USER_MSR&APX_F, RegMem|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
+urdmsr, 0xf2f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
 uwrmsr, 0xf30f38f8, USER_MSR, Modrm|NoSuf|NoRex64, { Reg64, Reg64 }
+uwrmsr, 0xf3f8, USER_MSR&APX_F, Modrm||EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
 // Immediates want to be first; md_assemble() takes care of swapping operands
 // accordingly.
-uwrmsr, 0xf3f8/0, USER_MSR, Modrm|Vex128|VexMap7|VexW0|NoSuf, { Imm32, Reg64 }
+uwrmsr, 0xf3f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
 
 // USER_MSR instructions end.
 

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index ac4a01cab141d2d4fdec83313cb4bea9ce2681b7..c0aab67387679ba4ac8f7cf42e11af7f1b0d671b 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -41152,12 +41152,22 @@ static const insn_template i386_optab[] =
          0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
          0, 0, 0, 0, 0, 0 } } } },
+  { MN_urdmsr, 0xf8, 2, SPACE_EVEXMAP4, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0,
+      0, 0, 0, 0, 0, 1, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0 },
+    { { 98, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+         0, 0, 0, 0, 0, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+         0, 0, 0, 0, 0, 0 } } } },
   { MN_urdmsr, 0xf8, 2, SPACE_VEXMAP7, 0,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+      0, 0, 0, 1, 0, 1, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0 },
     { { 98, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 98, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -41172,12 +41182,22 @@ static const insn_template i386_optab[] =
          0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
          0, 0, 0, 0, 0, 0 } } } },
+  { MN_uwrmsr, 0xf8, 2, SPACE_EVEXMAP4, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0 },
+    { { 98, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+         0, 0, 0, 0, 0, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+         0, 0, 0, 0, 0, 0 } } } },
   { MN_uwrmsr, 0xf8, 2, SPACE_VEXMAP7, 0,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+      0, 0, 0, 1, 0, 1, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0 },
     { { 98, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 98, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -41521,8 +41541,8 @@ static const i386_op_off_t i386_op_sets[] =
   3842, 3843, 3844, 3845, 3846, 3847, 3848, 3849,
   3850, 3851, 3852, 3853, 3854, 3855, 3856, 3857,
   3858, 3859, 3860, 3861, 3862, 3863, 3864, 3865,
-  3867, 3869, 3871, 3873, 3875, 3876, 3877, 3879,
-  3881, 3882, 3883, 3884, 3885
+  3867, 3869, 3871, 3873, 3875, 3876, 3877, 3880,
+  3883, 3884, 3885, 3886, 3887
 };
 
 /* i386 mnemonics table.  */