]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/dg1: Add fake PCH
authorLucas De Marchi <lucas.demarchi@intel.com>
Mon, 13 Jul 2020 18:23:21 +0000 (11:23 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 14 Jul 2020 09:47:21 +0000 (02:47 -0700)
DG1 has the south engine display on the same PCI device. Ideally we
could use HAS_PCH_SPLIT(), but that macro is misused all across the
code base to rather signify a range of gens. So add a fake one for DG1
to be used where needed.

Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200713182321.12390-6-lucas.demarchi@intel.com
drivers/gpu/drm/i915/intel_pch.c
drivers/gpu/drm/i915/intel_pch.h

index c668e99eb2e469a581d4a822ac34276286b9c64f..6c97192e9ca87ea923d522ca0fcc75c40f7f0a79 100644 (file)
@@ -188,6 +188,12 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
 {
        struct pci_dev *pch = NULL;
 
+       /* DG1 has south engine display on the same PCI device */
+       if (IS_DG1(dev_priv)) {
+               dev_priv->pch_type = PCH_DG1;
+               return;
+       }
+
        /*
         * The reason to probe ISA bridge instead of Dev31:Fun0 is to
         * make graphics device passthrough work easy for VMM, that only
index 3053d1ce398b18dc80290880eedb8fb242deb1e8..06d2cd50af0b9d4d8b28ee48a9d1fa23cdfd476f 100644 (file)
@@ -26,6 +26,9 @@ enum intel_pch {
        PCH_JSP,        /* Jasper Lake PCH */
        PCH_MCC,        /* Mule Creek Canyon PCH */
        PCH_TGP,        /* Tiger Lake PCH */
+
+       /* Fake PCHs, functionality handled on the same PCI dev */
+       PCH_DG1 = 1024,
 };
 
 #define INTEL_PCH_DEVICE_ID_MASK               0xff80
@@ -56,6 +59,7 @@ enum intel_pch {
 
 #define INTEL_PCH_TYPE(dev_priv)               ((dev_priv)->pch_type)
 #define INTEL_PCH_ID(dev_priv)                 ((dev_priv)->pch_id)
+#define HAS_PCH_DG1(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_DG1)
 #define HAS_PCH_JSP(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_JSP)
 #define HAS_PCH_MCC(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
 #define HAS_PCH_TGP(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)