/* Subroutines for insn-output.c for ATMEL AVR micro controllers
- Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
+ Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
Contributed by Denis Chertykov (denisc@overta.ru)
This file is part of GNU CC.
jump_tables_size++;
}
+/* Returns 1 if SCRATCH are safe to be allocated as a scratch
+ registers (for a define_peephole2) in the current function. */
+
+int
+avr_peep2_scratch_safe (scratch)
+ rtx scratch;
+{
+ if ((interrupt_function_p (current_function_decl)
+ || signal_function_p (current_function_decl))
+ && leaf_function_p ())
+ {
+ int first_reg = true_regnum (scratch);
+ int last_reg = first_reg + GET_MODE_SIZE (GET_MODE (scratch)) - 1;
+ int reg;
+
+ for (reg = first_reg; reg <= last_reg; reg++)
+ {
+ if (!regs_ever_live[reg])
+ return 0;
+ }
+ }
+ return 1;
+}
;; -*- Mode: Scheme -*-
;; Machine description for GNU compiler,
;; for ATMEL AVR micro controllers.
-;; Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
+;; Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
;; Contributed by Denis Chertykov (denisc@overta.ru)
;; This file is part of GNU CC.
&& test_hard_reg_class (NO_LD_REGS, operands[0]))"
[(parallel [(set (match_dup 0) (match_dup 1))
(clobber (match_dup 2))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
;;============================================================================
;; move word (16 bit)
&& test_hard_reg_class (NO_LD_REGS, operands[0]))"
[(parallel [(set (match_dup 0) (match_dup 1))
(clobber (match_dup 2))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
;; '*' because it is not used in rtl generation, only in above peephole
(define_insn "*reload_inhi"
&& test_hard_reg_class (NO_LD_REGS, operands[0]))"
[(parallel [(set (match_dup 0) (match_dup 1))
(clobber (match_dup 2))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
;; '*' because it is not used in rtl generation.
(define_insn "*reload_insi"
""
[(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
(define_insn "*ashlhi3_const"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
""
[(parallel [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
(define_insn "*ashlsi3_const"
[(set (match_operand:SI 0 "register_operand" "=r,r,r")
""
[(parallel [(set (match_dup 0) (ashiftrt:HI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
(define_insn "*ashrhi3_const"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
""
[(parallel [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
(define_insn "*ashrsi3_const"
[(set (match_operand:SI 0 "register_operand" "=r,r,r")
""
[(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
(define_insn "*lshrhi3_const"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
""
[(parallel [(set (match_dup 0) (lshiftrt:SI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
- "")
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
(define_insn "*lshrsi3_const"
[(set (match_operand:SI 0 "register_operand" "=r,r,r")