mtd: nand: brcmnand: fix NAND timeout when accessing eMMC

When booting a board to NAND and accessing NAND while eMMC
transactions are occurring the NAND will sometimes timeout. This
is due to both NAND and eMMC controller sharing the same data bus
on BCMBCA chips. Fix is to extend NAND timeout to allow eMMC
transactions time to complete.

Signed-off-by: David Regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 299dd2bca5b427055f4803a4ed1cc07d47d4c27e..b43281b8204f6050bb067e59381f818116650f65 100644 (file)
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -101,7 +101,7 @@ struct brcm_nand_dma_desc {
 #define BRCMNAND_MIN_DEVSIZE   (4ULL * 1024 * 1024)
 
 #define NAND_CTRL_RDY                  (INTFC_CTLR_READY | INTFC_FLASH_READY)
-#define NAND_POLL_STATUS_TIMEOUT_MS    100
+#define NAND_POLL_STATUS_TIMEOUT_MS    500
 
 #define EDU_CMD_WRITE          0x00
 #define EDU_CMD_READ           0x01