+2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * altivec.md (UNSPEC_VPACK_UNS_UNS_MOD_DIRECT): New unspec.
+ (UNSPEC_VUNPACK_HI_SIGN_DIRECT): Likewise.
+ (UNSPEC_VUNPACK_LO_SIGN_DIRECT): Likewise.
+ (mulv8hi3): Use gen_altivec_vpkuwum_direct instead of
+ gen_altivec_vpkuwum.
+ (altivec_vpkpx): Test for VECTOR_ELT_ORDER_BIG instead of for
+ BYTES_BIG_ENDIAN.
+ (altivec_vpks<VI_char>ss): Likewise.
+ (altivec_vpks<VI_char>us): Likewise.
+ (altivec_vpku<VI_char>us): Likewise.
+ (altivec_vpku<VI_char>um): Likewise.
+ (altivec_vpku<VI_char>um_direct): New (copy of
+ altivec_vpku<VI_char>um that still relies on BYTES_BIG_ENDIAN, for
+ internal use).
+ (altivec_vupkhs<VU_char>): Emit vupkls* instead of vupkhs* when
+ target is little endian and -maltivec=be is not specified.
+ (*altivec_vupkhs<VU_char>_direct): New (copy of
+ altivec_vupkhs<VU_char> that always emits vupkhs*, for internal
+ use).
+ (altivec_vupkls<VU_char>): Emit vupkhs* instead of vupkls* when
+ target is little endian and -maltivec=be is not specified.
+ (*altivec_vupkls<VU_char>_direct): New (copy of
+ altivec_vupkls<VU_char> that always emits vupkls*, for internal
+ use).
+ (altivec_vupkhpx): Emit vupklpx instead of vupkhpx when target is
+ little endian and -maltivec=be is not specified.
+ (altivec_vupklpx): Emit vupkhpx instead of vupklpx when target is
+ little endian and -maltivec=be is not specified.
+
2014-02-05 Richard Henderson <rth@redhat.com>
PR debug/52727
UNSPEC_VPACK_SIGN_UNS_SAT
UNSPEC_VPACK_UNS_UNS_SAT
UNSPEC_VPACK_UNS_UNS_MOD
+ UNSPEC_VPACK_UNS_UNS_MOD_DIRECT
UNSPEC_VSLV4SI
UNSPEC_VSLO
UNSPEC_VSR
UNSPEC_VLSDOI
UNSPEC_VUNPACK_HI_SIGN
UNSPEC_VUNPACK_LO_SIGN
+ UNSPEC_VUNPACK_HI_SIGN_DIRECT
+ UNSPEC_VUNPACK_LO_SIGN_DIRECT
UNSPEC_VUPKHPX
UNSPEC_VUPKLPX
UNSPEC_DST
emit_insn (gen_altivec_vmulosh (odd, operands[1], operands[2]));
emit_insn (gen_altivec_vmrghw_direct (high, even, odd));
emit_insn (gen_altivec_vmrglw_direct (low, even, odd));
- emit_insn (gen_altivec_vpkuwum (operands[0], high, low));
+ emit_insn (gen_altivec_vpkuwum_direct (operands[0], high, low));
}
else
{
emit_insn (gen_altivec_vmulesh (odd, operands[1], operands[2]));
emit_insn (gen_altivec_vmrghw_direct (high, odd, even));
emit_insn (gen_altivec_vmrglw_direct (low, odd, even));
- emit_insn (gen_altivec_vpkuwum (operands[0], low, high));
+ emit_insn (gen_altivec_vpkuwum_direct (operands[0], low, high));
}
DONE;
"TARGET_ALTIVEC"
"*
{
- if (BYTES_BIG_ENDIAN)
+ if (VECTOR_ELT_ORDER_BIG)
return \"vpkpx %0,%1,%2\";
else
return \"vpkpx %0,%2,%1\";
"<VI_unit>"
"*
{
- if (BYTES_BIG_ENDIAN)
+ if (VECTOR_ELT_ORDER_BIG)
return \"vpks<VI_char>ss %0,%1,%2\";
else
return \"vpks<VI_char>ss %0,%2,%1\";
"<VI_unit>"
"*
{
- if (BYTES_BIG_ENDIAN)
+ if (VECTOR_ELT_ORDER_BIG)
return \"vpks<VI_char>us %0,%1,%2\";
else
return \"vpks<VI_char>us %0,%2,%1\";
"<VI_unit>"
"*
{
- if (BYTES_BIG_ENDIAN)
+ if (VECTOR_ELT_ORDER_BIG)
return \"vpku<VI_char>us %0,%1,%2\";
else
return \"vpku<VI_char>us %0,%2,%1\";
UNSPEC_VPACK_UNS_UNS_MOD))]
"<VI_unit>"
"*
+ {
+ if (VECTOR_ELT_ORDER_BIG)
+ return \"vpku<VI_char>um %0,%1,%2\";
+ else
+ return \"vpku<VI_char>um %0,%2,%1\";
+ }"
+ [(set_attr "type" "vecperm")])
+
+(define_insn "altivec_vpku<VI_char>um_direct"
+ [(set (match_operand:<VP_small> 0 "register_operand" "=v")
+ (unspec:<VP_small> [(match_operand:VP 1 "register_operand" "v")
+ (match_operand:VP 2 "register_operand" "v")]
+ UNSPEC_VPACK_UNS_UNS_MOD_DIRECT))]
+ "<VI_unit>"
+ "*
{
if (BYTES_BIG_ENDIAN)
return \"vpku<VI_char>um %0,%1,%2\";
(unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]
UNSPEC_VUNPACK_HI_SIGN))]
"<VI_unit>"
+{
+ if (VECTOR_ELT_ORDER_BIG)
+ return "vupkhs<VU_char> %0,%1";
+ else
+ return "vupkls<VU_char> %0,%1";
+}
+ [(set_attr "type" "vecperm")])
+
+(define_insn "*altivec_vupkhs<VU_char>_direct"
+ [(set (match_operand:VP 0 "register_operand" "=v")
+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]
+ UNSPEC_VUNPACK_HI_SIGN_DIRECT))]
+ "<VI_unit>"
"vupkhs<VU_char> %0,%1"
[(set_attr "type" "vecperm")])
(unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]
UNSPEC_VUNPACK_LO_SIGN))]
"<VI_unit>"
+{
+ if (VECTOR_ELT_ORDER_BIG)
+ return "vupkls<VU_char> %0,%1";
+ else
+ return "vupkhs<VU_char> %0,%1";
+}
+ [(set_attr "type" "vecperm")])
+
+(define_insn "*altivec_vupkls<VU_char>_direct"
+ [(set (match_operand:VP 0 "register_operand" "=v")
+ (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")]
+ UNSPEC_VUNPACK_LO_SIGN_DIRECT))]
+ "<VI_unit>"
"vupkls<VU_char> %0,%1"
[(set_attr "type" "vecperm")])
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]
UNSPEC_VUPKHPX))]
"TARGET_ALTIVEC"
- "vupkhpx %0,%1"
+{
+ if (VECTOR_ELT_ORDER_BIG)
+ return "vupkhpx %0,%1";
+ else
+ return "vupklpx %0,%1";
+}
[(set_attr "type" "vecperm")])
(define_insn "altivec_vupklpx"
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")]
UNSPEC_VUPKLPX))]
"TARGET_ALTIVEC"
- "vupklpx %0,%1"
+{
+ if (VECTOR_ELT_ORDER_BIG)
+ return "vupklpx %0,%1";
+ else
+ return "vupkhpx %0,%1";
+}
[(set_attr "type" "vecperm")])
;; Compare vectors producing a vector result and a predicate, setting CR6 to
+2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * gcc.dg/vmx/pack.c: New.
+ * gcc.dg/vmx/pack-be-order.c: New.
+ * gcc.dg/vmx/unpack.c: New.
+ * gcc.dg/vmx/unpack-be-order.c: New.
+
2014-02-05 Balaji V. Iyer <balaji.v.iyer@intel.com>
* g++.dg/cilk-plus/CK/catch_exc.cc: Disable test for -O1.
--- /dev/null
+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */
+
+#include "harness.h"
+
+#define BIG 4294967295
+
+static void test()
+{
+ /* Input vectors. */
+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};
+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};
+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vssb = {0,1,2,3,4,5,6,7};
+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};
+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};
+ vector unsigned int vuia = {0,1,2,3};
+ vector unsigned int vuib = {4,5,6,7};
+ vector signed int vsia = {-4,-3,-2,-1};
+ vector signed int vsib = {0,1,2,3};
+ vector bool int vbia = {0,BIG,BIG,BIG};
+ vector bool int vbib = {BIG,0,0,0};
+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),
+ (1<<24) + (5<<19) + (6<<11) + (7<<3),
+ (0<<24) + (8<<19) + (9<<11) + (10<<3),
+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};
+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),
+ (0<<24) + (17<<19) + (18<<11) + (19<<3),
+ (1<<24) + (20<<19) + (21<<11) + (22<<3),
+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};
+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};
+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};
+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};
+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};
+ vector unsigned int vuic = {0,65536,1,65537};
+ vector unsigned int vuid = {2,65538,3,65539};
+ vector signed int vsic = {-1,-32768,0,32767};
+ vector signed int vsid = {-2,-32769,1,32768};
+
+ /* Result vectors. */
+ vector unsigned char vucr;
+ vector signed char vscr;
+ vector bool char vbcr;
+ vector unsigned short vusr;
+ vector signed short vssr;
+ vector bool short vbsr;
+ vector pixel vpr;
+ vector unsigned char vucsr;
+ vector signed char vscsr;
+ vector unsigned short vussr;
+ vector signed short vsssr;
+ vector unsigned char vucsur1, vucsur2;
+ vector unsigned short vussur1, vussur2;
+
+ /* Expected result vectors. */
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ vector unsigned char vucer = {8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7};
+ vector signed char vscer = {0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1};
+ vector bool char vbcer = {255,0,0,255,255,255,0,255,0,255,255,0,0,0,255,0};
+ vector unsigned short vuser = {4,5,6,7,0,1,2,3};
+ vector signed short vsser = {0,1,2,3,-4,-3,-2,-1};
+ vector bool short vbser = {65535,0,0,0,0,65535,65535,65535};
+ vector pixel vper = {(1<<15) + (14<<10) + (15<<5) + 16,
+ (0<<15) + (17<<10) + (18<<5) + 19,
+ (1<<15) + (20<<10) + (21<<5) + 22,
+ (0<<15) + (23<<10) + (24<<5) + 25,
+ (0<<15) + (2<<10) + (3<<5) + 4,
+ (1<<15) + (5<<10) + (6<<5) + 7,
+ (0<<15) + (8<<10) + (9<<5) + 10,
+ (1<<15) + (11<<10) + (12<<5) + 13};
+ vector unsigned char vucser = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255};
+ vector signed char vscser = {-3,-128,2,127,-4,-128,3,127,
+ -1,-128,0,127,-2,-128,1,127};
+ vector unsigned short vusser = {2,65535,3,65535,0,65535,1,65535};
+ vector signed short vssser = {-2,-32768,1,32767,-1,-32768,0,32767};
+ vector unsigned char vucsuer1 = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255};
+ vector unsigned char vucsuer2 = {0,0,2,129,0,0,3,130,0,0,0,127,0,0,1,128};
+ vector unsigned short vussuer1 = {2,65535,3,65535,0,65535,1,65535};
+ vector unsigned short vussuer2 = {0,0,1,32768,0,0,0,32767};
+#else
+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};
+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};
+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};
+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,
+ (1<<15) + (5<<10) + (6<<5) + 7,
+ (0<<15) + (8<<10) + (9<<5) + 10,
+ (1<<15) + (11<<10) + (12<<5) + 13,
+ (1<<15) + (14<<10) + (15<<5) + 16,
+ (0<<15) + (17<<10) + (18<<5) + 19,
+ (1<<15) + (20<<10) + (21<<5) + 22,
+ (0<<15) + (23<<10) + (24<<5) + 25};
+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};
+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,
+ -3,-128,2,127,-4,-128,3,127};
+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};
+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};
+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};
+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};
+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};
+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};
+#endif
+
+ vucr = vec_pack (vusa, vusb);
+ vscr = vec_pack (vssa, vssb);
+ vbcr = vec_pack (vbsa, vbsb);
+ vusr = vec_pack (vuia, vuib);
+ vssr = vec_pack (vsia, vsib);
+ vbsr = vec_pack (vbia, vbib);
+ vpr = vec_packpx (vipa, vipb);
+ vucsr = vec_packs (vusc, vusd);
+ vscsr = vec_packs (vssc, vssd);
+ vussr = vec_packs (vuic, vuid);
+ vsssr = vec_packs (vsic, vsid);
+ vucsur1 = vec_packsu (vusc, vusd);
+ vucsur2 = vec_packsu (vssc, vssd);
+ vussur1 = vec_packsu (vuic, vuid);
+ vussur2 = vec_packsu (vsic, vsid);
+
+ check (vec_all_eq (vucr, vucer), "vucr");
+ check (vec_all_eq (vscr, vscer), "vscr");
+ check (vec_all_eq (vbcr, vbcer), "vbcr");
+ check (vec_all_eq (vusr, vuser), "vusr");
+ check (vec_all_eq (vssr, vsser), "vssr");
+ check (vec_all_eq (vbsr, vbser), "vbsr");
+ check (vec_all_eq (vpr, vper ), "vpr" );
+ check (vec_all_eq (vucsr, vucser), "vucsr");
+ check (vec_all_eq (vscsr, vscser), "vscsr");
+ check (vec_all_eq (vussr, vusser), "vussr");
+ check (vec_all_eq (vsssr, vssser), "vsssr");
+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");
+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");
+ check (vec_all_eq (vussur1, vussuer1), "vussur1");
+ check (vec_all_eq (vussur2, vussuer2), "vussur2");
+}
--- /dev/null
+#include "harness.h"
+
+#define BIG 4294967295
+
+static void test()
+{
+ /* Input vectors. */
+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};
+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};
+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vssb = {0,1,2,3,4,5,6,7};
+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};
+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};
+ vector unsigned int vuia = {0,1,2,3};
+ vector unsigned int vuib = {4,5,6,7};
+ vector signed int vsia = {-4,-3,-2,-1};
+ vector signed int vsib = {0,1,2,3};
+ vector bool int vbia = {0,BIG,BIG,BIG};
+ vector bool int vbib = {BIG,0,0,0};
+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),
+ (1<<24) + (5<<19) + (6<<11) + (7<<3),
+ (0<<24) + (8<<19) + (9<<11) + (10<<3),
+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};
+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),
+ (0<<24) + (17<<19) + (18<<11) + (19<<3),
+ (1<<24) + (20<<19) + (21<<11) + (22<<3),
+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};
+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};
+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};
+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};
+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};
+ vector unsigned int vuic = {0,65536,1,65537};
+ vector unsigned int vuid = {2,65538,3,65539};
+ vector signed int vsic = {-1,-32768,0,32767};
+ vector signed int vsid = {-2,-32769,1,32768};
+
+ /* Result vectors. */
+ vector unsigned char vucr;
+ vector signed char vscr;
+ vector bool char vbcr;
+ vector unsigned short vusr;
+ vector signed short vssr;
+ vector bool short vbsr;
+ vector pixel vpr;
+ vector unsigned char vucsr;
+ vector signed char vscsr;
+ vector unsigned short vussr;
+ vector signed short vsssr;
+ vector unsigned char vucsur1, vucsur2;
+ vector unsigned short vussur1, vussur2;
+
+ /* Expected result vectors. */
+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};
+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};
+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};
+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,
+ (1<<15) + (5<<10) + (6<<5) + 7,
+ (0<<15) + (8<<10) + (9<<5) + 10,
+ (1<<15) + (11<<10) + (12<<5) + 13,
+ (1<<15) + (14<<10) + (15<<5) + 16,
+ (0<<15) + (17<<10) + (18<<5) + 19,
+ (1<<15) + (20<<10) + (21<<5) + 22,
+ (0<<15) + (23<<10) + (24<<5) + 25};
+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};
+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,
+ -3,-128,2,127,-4,-128,3,127};
+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};
+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};
+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};
+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};
+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};
+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};
+
+ vucr = vec_pack (vusa, vusb);
+ vscr = vec_pack (vssa, vssb);
+ vbcr = vec_pack (vbsa, vbsb);
+ vusr = vec_pack (vuia, vuib);
+ vssr = vec_pack (vsia, vsib);
+ vbsr = vec_pack (vbia, vbib);
+ vpr = vec_packpx (vipa, vipb);
+ vucsr = vec_packs (vusc, vusd);
+ vscsr = vec_packs (vssc, vssd);
+ vussr = vec_packs (vuic, vuid);
+ vsssr = vec_packs (vsic, vsid);
+ vucsur1 = vec_packsu (vusc, vusd);
+ vucsur2 = vec_packsu (vssc, vssd);
+ vussur1 = vec_packsu (vuic, vuid);
+ vussur2 = vec_packsu (vsic, vsid);
+
+ check (vec_all_eq (vucr, vucer), "vucr");
+ check (vec_all_eq (vscr, vscer), "vscr");
+ check (vec_all_eq (vbcr, vbcer), "vbcr");
+ check (vec_all_eq (vusr, vuser), "vusr");
+ check (vec_all_eq (vssr, vsser), "vssr");
+ check (vec_all_eq (vbsr, vbser), "vbsr");
+ check (vec_all_eq (vpr, vper ), "vpr" );
+ check (vec_all_eq (vucsr, vucser), "vucsr");
+ check (vec_all_eq (vscsr, vscser), "vscsr");
+ check (vec_all_eq (vussr, vusser), "vussr");
+ check (vec_all_eq (vsssr, vssser), "vsssr");
+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");
+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");
+ check (vec_all_eq (vussur1, vussuer1), "vussur1");
+ check (vec_all_eq (vussur2, vussuer2), "vussur2");
+}
--- /dev/null
+/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */
+
+#include "harness.h"
+
+#define BIG 4294967295
+
+static void test()
+{
+ /* Input vectors. */
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};
+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,
+ (1<<15) + (4<<10) + (5<<5) + 6,
+ (0<<15) + (7<<10) + (8<<5) + 9,
+ (1<<15) + (10<<10) + (11<<5) + 12,
+ (1<<15) + (13<<10) + (14<<5) + 15,
+ (0<<15) + (16<<10) + (17<<5) + 18,
+ (1<<15) + (19<<10) + (20<<5) + 21,
+ (0<<15) + (22<<10) + (23<<5) + 24};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};
+
+ /* Result vectors. */
+ vector signed short vsch, vscl;
+ vector bool short vbsh, vbsl;
+ vector unsigned int vuih, vuil;
+ vector signed int vsih, vsil;
+ vector bool int vbih, vbil;
+
+ /* Expected result vectors. */
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ vector signed short vschr = {0,1,2,3,4,5,6,7};
+ vector signed short vsclr = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector bool short vbshr = {65535,0,0,65535,65535,65535,0,65535};
+ vector bool short vbslr = {0,65535,65535,0,0,0,65535,0};
+ vector unsigned int vuihr = {(65535<<24) + (13<<16) + (14<<8) + 15,
+ (0<<24) + (16<<16) + (17<<8) + 18,
+ (65535<<24) + (19<<16) + (20<<8) + 21,
+ (0<<24) + (22<<16) + (23<<8) + 24};
+ vector unsigned int vuilr = {(0<<24) + (1<<16) + (2<<8) + 3,
+ (65535<<24) + (4<<16) + (5<<8) + 6,
+ (0<<24) + (7<<16) + (8<<8) + 9,
+ (65535<<24) + (10<<16) + (11<<8) + 12};
+ vector signed int vsihr = {0,1,2,3};
+ vector signed int vsilr = {-4,-3,-2,-1};
+ vector bool int vbihr = {0,0,BIG,0};
+ vector bool int vbilr = {0,BIG,BIG,0};
+#else
+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vsclr = {0,1,2,3,4,5,6,7};
+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};
+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};
+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,
+ (65535<<24) + (4<<16) + (5<<8) + 6,
+ (0<<24) + (7<<16) + (8<<8) + 9,
+ (65535<<24) + (10<<16) + (11<<8) + 12};
+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,
+ (0<<24) + (16<<16) + (17<<8) + 18,
+ (65535<<24) + (19<<16) + (20<<8) + 21,
+ (0<<24) + (22<<16) + (23<<8) + 24};
+ vector signed int vsihr = {-4,-3,-2,-1};
+ vector signed int vsilr = {0,1,2,3};
+ vector bool int vbihr = {0,BIG,BIG,0};
+ vector bool int vbilr = {0,0,BIG,0};
+#endif
+
+ vsch = vec_unpackh (vsc);
+ vscl = vec_unpackl (vsc);
+ vbsh = vec_unpackh (vbc);
+ vbsl = vec_unpackl (vbc);
+ vuih = vec_unpackh (vp);
+ vuil = vec_unpackl (vp);
+ vsih = vec_unpackh (vss);
+ vsil = vec_unpackl (vss);
+ vbih = vec_unpackh (vbs);
+ vbil = vec_unpackl (vbs);
+
+ check (vec_all_eq (vsch, vschr), "vsch");
+ check (vec_all_eq (vscl, vsclr), "vscl");
+ check (vec_all_eq (vbsh, vbshr), "vbsh");
+ check (vec_all_eq (vbsl, vbslr), "vbsl");
+ check (vec_all_eq (vuih, vuihr), "vuih");
+ check (vec_all_eq (vuil, vuilr), "vuil");
+ check (vec_all_eq (vsih, vsihr), "vsih");
+ check (vec_all_eq (vsil, vsilr), "vsil");
+ check (vec_all_eq (vbih, vbihr), "vbih");
+ check (vec_all_eq (vbil, vbilr), "vbil");
+}
--- /dev/null
+#include "harness.h"
+
+#define BIG 4294967295
+
+static void test()
+{
+ /* Input vectors. */
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};
+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,
+ (1<<15) + (4<<10) + (5<<5) + 6,
+ (0<<15) + (7<<10) + (8<<5) + 9,
+ (1<<15) + (10<<10) + (11<<5) + 12,
+ (1<<15) + (13<<10) + (14<<5) + 15,
+ (0<<15) + (16<<10) + (17<<5) + 18,
+ (1<<15) + (19<<10) + (20<<5) + 21,
+ (0<<15) + (22<<10) + (23<<5) + 24};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};
+
+ /* Result vectors. */
+ vector signed short vsch, vscl;
+ vector bool short vbsh, vbsl;
+ vector unsigned int vuih, vuil;
+ vector signed int vsih, vsil;
+ vector bool int vbih, vbil;
+
+ /* Expected result vectors. */
+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vsclr = {0,1,2,3,4,5,6,7};
+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};
+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};
+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,
+ (65535<<24) + (4<<16) + (5<<8) + 6,
+ (0<<24) + (7<<16) + (8<<8) + 9,
+ (65535<<24) + (10<<16) + (11<<8) + 12};
+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,
+ (0<<24) + (16<<16) + (17<<8) + 18,
+ (65535<<24) + (19<<16) + (20<<8) + 21,
+ (0<<24) + (22<<16) + (23<<8) + 24};
+ vector signed int vsihr = {-4,-3,-2,-1};
+ vector signed int vsilr = {0,1,2,3};
+ vector bool int vbihr = {0,BIG,BIG,0};
+ vector bool int vbilr = {0,0,BIG,0};
+
+ vsch = vec_unpackh (vsc);
+ vscl = vec_unpackl (vsc);
+ vbsh = vec_unpackh (vbc);
+ vbsl = vec_unpackl (vbc);
+ vuih = vec_unpackh (vp);
+ vuil = vec_unpackl (vp);
+ vsih = vec_unpackh (vss);
+ vsil = vec_unpackl (vss);
+ vbih = vec_unpackh (vbs);
+ vbil = vec_unpackl (vbs);
+
+ check (vec_all_eq (vsch, vschr), "vsch");
+ check (vec_all_eq (vscl, vsclr), "vscl");
+ check (vec_all_eq (vbsh, vbshr), "vbsh");
+ check (vec_all_eq (vbsl, vbslr), "vbsl");
+ check (vec_all_eq (vuih, vuihr), "vuih");
+ check (vec_all_eq (vuil, vuilr), "vuil");
+ check (vec_all_eq (vsih, vsihr), "vsih");
+ check (vec_all_eq (vsil, vsilr), "vsil");
+ check (vec_all_eq (vbih, vbihr), "vbih");
+ check (vec_all_eq (vbil, vbilr), "vbil");
+}
projects / thirdparty / gcc.git / commitdiff
