perf/x86: Add hw_perf_event::aux_config

Start a new section for AUX PMUs in hw_perf_event.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>

diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
index 2959970dd10eb1c3f26ca3c95b4cfc083fc8a214..fd4670a6694e77b2a2341c8fabc41586b92b9695 100644 (file)
--- a/arch/x86/events/intel/pt.c
+++ b/arch/x86/events/intel/pt.c
@@ -416,7 +416,7 @@ static bool pt_event_valid(struct perf_event *event)
 static void pt_config_start(struct perf_event *event)
 {
        struct pt *pt = this_cpu_ptr(&pt_ctx);
-       u64 ctl = event->hw.config;
+       u64 ctl = event->hw.aux_config;
 
        ctl |= RTIT_CTL_TRACEEN;
        if (READ_ONCE(pt->vmx_on))
@@ -424,7 +424,7 @@ static void pt_config_start(struct perf_event *event)
        else
                wrmsrl(MSR_IA32_RTIT_CTL, ctl);
 
-       WRITE_ONCE(event->hw.config, ctl);
+       WRITE_ONCE(event->hw.aux_config, ctl);
 }
 
 /* Address ranges and their corresponding msr configuration registers */
@@ -503,7 +503,7 @@ static void pt_config(struct perf_event *event)
        u64 reg;
 
        /* First round: clear STATUS, in particular the PSB byte counter. */
-       if (!event->hw.config) {
+       if (!event->hw.aux_config) {
                perf_event_itrace_started(event);
                wrmsrl(MSR_IA32_RTIT_STATUS, 0);
        }
@@ -533,14 +533,14 @@ static void pt_config(struct perf_event *event)
 
        reg |= (event->attr.config & PT_CONFIG_MASK);
 
-       event->hw.config = reg;
+       event->hw.aux_config = reg;
        pt_config_start(event);
 }
 
 static void pt_config_stop(struct perf_event *event)
 {
        struct pt *pt = this_cpu_ptr(&pt_ctx);
-       u64 ctl = READ_ONCE(event->hw.config);
+       u64 ctl = READ_ONCE(event->hw.aux_config);
 
        /* may be already stopped by a PMI */
        if (!(ctl & RTIT_CTL_TRACEEN))
@@ -550,7 +550,7 @@ static void pt_config_stop(struct perf_event *event)
        if (!READ_ONCE(pt->vmx_on))
                wrmsrl(MSR_IA32_RTIT_CTL, ctl);
 
-       WRITE_ONCE(event->hw.config, ctl);
+       WRITE_ONCE(event->hw.aux_config, ctl);
 
        /*
         * A wrmsr that disables trace generation serializes other PT
@@ -1557,7 +1557,7 @@ void intel_pt_handle_vmx(int on)
 
        /* Turn PTs back on */
        if (!on && event)
-               wrmsrl(MSR_IA32_RTIT_CTL, event->hw.config);
+               wrmsrl(MSR_IA32_RTIT_CTL, event->hw.aux_config);
 
        local_irq_restore(flags);
 }

diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 1a8942277ddad258ee6c54681b6aafd54317c094..6bb0c21d6335b8108af39e481c0910c8020f741d 100644 (file)
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -168,6 +168,9 @@ struct hw_perf_event {
                        struct hw_perf_event_extra extra_reg;
                        struct hw_perf_event_extra branch_reg;
                };
+               struct { /* aux / Intel-PT */
+                       u64             aux_config;
+               };
                struct { /* software */
                        struct hrtimer  hrtimer;
                };