6.12-stable patches

added patches:
	x86-microcode-amd-add-get_patch_level.patch
	x86-microcode-amd-get-rid-of-the-_load_microcode_amd-forward-declaration.patch
	x86-microcode-amd-have-__apply_microcode_amd-return-bool.patch
	x86-microcode-amd-load-only-sha256-checksummed-patches.patch
	x86-microcode-amd-merge-early_apply_microcode-into-its-single-callsite.patch
	x86-microcode-amd-remove-ugly-linebreak-in-__verify_patch_section-signature.patch
	x86-microcode-amd-remove-unused-save_microcode_in_initrd_amd-declarations.patch
	x86-microcode-amd-return-bool-from-find_blobs_in_containers.patch

diff --git a/queue-6.12/series b/queue-6.12/series
index 0903eecc45cf40b3ea5b96c39aa8f0bcf716ea2b..77bb5a81024e8e1ebeb06e422ed546f5d91b66ff 100644 (file)
--- a/queue-6.12/series
+++ b/queue-6.12/series
@@ -140,3 +140,11 @@ riscv-signal-fix-signal_minsigstksz.patch
 riscv-cpufeature-use-bitmap_equal-instead-of-memcmp.patch
 efi-don-t-map-the-entire-mokvar-table-to-determine-its-size.patch
 amdgpu-pm-legacy-fix-suspend-resume-issues.patch
+x86-microcode-amd-return-bool-from-find_blobs_in_containers.patch
+x86-microcode-amd-have-__apply_microcode_amd-return-bool.patch
+x86-microcode-amd-remove-ugly-linebreak-in-__verify_patch_section-signature.patch
+x86-microcode-amd-remove-unused-save_microcode_in_initrd_amd-declarations.patch
+x86-microcode-amd-merge-early_apply_microcode-into-its-single-callsite.patch
+x86-microcode-amd-get-rid-of-the-_load_microcode_amd-forward-declaration.patch
+x86-microcode-amd-add-get_patch_level.patch
+x86-microcode-amd-load-only-sha256-checksummed-patches.patch

diff --git a/queue-6.12/x86-microcode-amd-add-get_patch_level.patch b/queue-6.12/x86-microcode-amd-add-get_patch_level.patch
new file mode 100644 (file)
index 0000000..7e85144
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-add-get_patch_level.patch
@@ -0,0 +1,141 @@
+From 8e84288006610f6c2b1ff5a58132d3ec79c50112 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Thu, 23 Jan 2025 13:02:32 +0100
+Subject: x86/microcode/AMD: Add get_patch_level()
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit 037e81fb9d2dfe7b31fd97e5f578854e38f09887 upstream.
+
+Put the MSR_AMD64_PATCH_LEVEL reading of the current microcode revision
+the hw has, into a separate function.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lore.kernel.org/r/20250211163648.30531-6-bp@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c |   46 ++++++++++++++++++------------------
+ 1 file changed, 24 insertions(+), 22 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -145,6 +145,15 @@ ucode_path[] __maybe_unused = "kernel/x8
+  */
+ static u32 bsp_cpuid_1_eax __ro_after_init;
+ 
++static u32 get_patch_level(void)
++{
++      u32 rev, dummy __always_unused;
++
++      native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
++
++      return rev;
++}
++
+ static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
+ {
+       union zen_patch_rev p;
+@@ -483,10 +492,10 @@ static void scan_containers(u8 *ucode, s
+       }
+ }
+ 
+-static bool __apply_microcode_amd(struct microcode_amd *mc, unsigned int psize)
++static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
++                                unsigned int psize)
+ {
+       unsigned long p_addr = (unsigned long)&mc->hdr.data_code;
+-      u32 rev, dummy;
+ 
+       native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr);
+ 
+@@ -504,9 +513,8 @@ static bool __apply_microcode_amd(struct
+       }
+ 
+       /* verify patch application was successful */
+-      native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+-
+-      if (rev != mc->hdr.patch_id)
++      *cur_rev = get_patch_level();
++      if (*cur_rev != mc->hdr.patch_id)
+               return false;
+ 
+       return true;
+@@ -564,11 +572,12 @@ void __init load_ucode_amd_bsp(struct ea
+       struct cont_desc desc = { };
+       struct microcode_amd *mc;
+       struct cpio_data cp = { };
+-      u32 dummy;
++      u32 rev;
+ 
+       bsp_cpuid_1_eax = cpuid_1_eax;
+ 
+-      native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->old_rev, dummy);
++      rev = get_patch_level();
++      ed->old_rev = rev;
+ 
+       /* Needed in load_microcode_amd() */
+       ucode_cpu_info[0].cpu_sig.sig = cpuid_1_eax;
+@@ -590,8 +599,8 @@ void __init load_ucode_amd_bsp(struct ea
+       if (ed->old_rev > mc->hdr.patch_id)
+               return;
+ 
+-      if (__apply_microcode_amd(mc, desc.psize))
+-              native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);
++      if (__apply_microcode_amd(mc, &rev, desc.psize))
++              ed->new_rev = rev;
+ }
+ 
+ static inline bool patch_cpus_equivalent(struct ucode_patch *p,
+@@ -693,14 +702,9 @@ static void free_cache(void)
+ static struct ucode_patch *find_patch(unsigned int cpu)
+ {
+       struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+-      u32 rev, dummy __always_unused;
+       u16 equiv_id = 0;
+ 
+-      /* fetch rev if not populated yet: */
+-      if (!uci->cpu_sig.rev) {
+-              rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+-              uci->cpu_sig.rev = rev;
+-      }
++      uci->cpu_sig.rev = get_patch_level();
+ 
+       if (x86_family(bsp_cpuid_1_eax) < 0x17) {
+               equiv_id = find_equiv_id(&equiv_table, uci->cpu_sig.sig);
+@@ -723,22 +727,20 @@ void reload_ucode_amd(unsigned int cpu)
+ 
+       mc = p->data;
+ 
+-      rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+-
++      rev = get_patch_level();
+       if (rev < mc->hdr.patch_id) {
+-              if (__apply_microcode_amd(mc, p->size))
+-                      pr_info_once("reload revision: 0x%08x\n", mc->hdr.patch_id);
++              if (__apply_microcode_amd(mc, &rev, p->size))
++                      pr_info_once("reload revision: 0x%08x\n", rev);
+       }
+ }
+ 
+ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
+ {
+-      struct cpuinfo_x86 *c = &cpu_data(cpu);
+       struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+       struct ucode_patch *p;
+ 
+       csig->sig = cpuid_eax(0x00000001);
+-      csig->rev = c->microcode;
++      csig->rev = get_patch_level();
+ 
+       /*
+        * a patch could have been loaded early, set uci->mc so that
+@@ -779,7 +781,7 @@ static enum ucode_state apply_microcode_
+               goto out;
+       }
+ 
+-      if (!__apply_microcode_amd(mc_amd, p->size)) {
++      if (!__apply_microcode_amd(mc_amd, &rev, p->size)) {
+               pr_err("CPU%d: update failed for patch_level=0x%08x\n",
+                       cpu, mc_amd->hdr.patch_id);
+               return UCODE_ERROR;

diff --git a/queue-6.12/x86-microcode-amd-get-rid-of-the-_load_microcode_amd-forward-declaration.patch b/queue-6.12/x86-microcode-amd-get-rid-of-the-_load_microcode_amd-forward-declaration.patch
new file mode 100644 (file)
index 0000000..ee0a48f
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-get-rid-of-the-_load_microcode_amd-forward-declaration.patch
@@ -0,0 +1,91 @@
+From 520724f7ef05cba22e4fdf68f8ed42808df4be68 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Thu, 23 Jan 2025 12:51:37 +0100
+Subject: x86/microcode/AMD: Get rid of the _load_microcode_amd() forward declaration
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit b39c387164879eef71886fc93cee5ca7dd7bf500 upstream.
+
+Simply move save_microcode_in_initrd() down.
+
+No functional changes.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lore.kernel.org/r/20250211163648.30531-5-bp@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c |   54 +++++++++++++++++-------------------
+ 1 file changed, 26 insertions(+), 28 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -594,34 +594,6 @@ void __init load_ucode_amd_bsp(struct ea
+               native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);
+ }
+ 
+-static enum ucode_state _load_microcode_amd(u8 family, const u8 *data, size_t size);
+-
+-static int __init save_microcode_in_initrd(void)
+-{
+-      unsigned int cpuid_1_eax = native_cpuid_eax(1);
+-      struct cpuinfo_x86 *c = &boot_cpu_data;
+-      struct cont_desc desc = { 0 };
+-      enum ucode_state ret;
+-      struct cpio_data cp;
+-
+-      if (dis_ucode_ldr || c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10)
+-              return 0;
+-
+-      if (!find_blobs_in_containers(&cp))
+-              return -EINVAL;
+-
+-      scan_containers(cp.data, cp.size, &desc);
+-      if (!desc.mc)
+-              return -EINVAL;
+-
+-      ret = _load_microcode_amd(x86_family(cpuid_1_eax), desc.data, desc.size);
+-      if (ret > UCODE_UPDATED)
+-              return -EINVAL;
+-
+-      return 0;
+-}
+-early_initcall(save_microcode_in_initrd);
+-
+ static inline bool patch_cpus_equivalent(struct ucode_patch *p,
+                                        struct ucode_patch *n,
+                                        bool ignore_stepping)
+@@ -1005,6 +977,32 @@ static enum ucode_state load_microcode_a
+       return ret;
+ }
+ 
++static int __init save_microcode_in_initrd(void)
++{
++      unsigned int cpuid_1_eax = native_cpuid_eax(1);
++      struct cpuinfo_x86 *c = &boot_cpu_data;
++      struct cont_desc desc = { 0 };
++      enum ucode_state ret;
++      struct cpio_data cp;
++
++      if (dis_ucode_ldr || c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10)
++              return 0;
++
++      if (!find_blobs_in_containers(&cp))
++              return -EINVAL;
++
++      scan_containers(cp.data, cp.size, &desc);
++      if (!desc.mc)
++              return -EINVAL;
++
++      ret = _load_microcode_amd(x86_family(cpuid_1_eax), desc.data, desc.size);
++      if (ret > UCODE_UPDATED)
++              return -EINVAL;
++
++      return 0;
++}
++early_initcall(save_microcode_in_initrd);
++
+ /*
+  * AMD microcode firmware naming convention, up to family 15h they are in
+  * the legacy file:

diff --git a/queue-6.12/x86-microcode-amd-have-__apply_microcode_amd-return-bool.patch b/queue-6.12/x86-microcode-amd-have-__apply_microcode_amd-return-bool.patch
new file mode 100644 (file)
index 0000000..f86d843
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-have-__apply_microcode_amd-return-bool.patch
@@ -0,0 +1,69 @@
+From 512f21bf2a41f16fa770b6ac4dff7a455cf7a7e6 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Mon, 18 Nov 2024 17:17:24 +0100
+Subject: x86/microcode/AMD: Have __apply_microcode_amd() return bool
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit 78e0aadbd4c6807a06a9d25bc190fe515d3f3c42 upstream
+
+This is the natural thing to do anyway.
+
+No functional changes.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c |   12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -484,7 +484,7 @@ static void scan_containers(u8 *ucode, s
+       }
+ }
+ 
+-static int __apply_microcode_amd(struct microcode_amd *mc, unsigned int psize)
++static bool __apply_microcode_amd(struct microcode_amd *mc, unsigned int psize)
+ {
+       unsigned long p_addr = (unsigned long)&mc->hdr.data_code;
+       u32 rev, dummy;
+@@ -508,9 +508,9 @@ static int __apply_microcode_amd(struct
+       native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+ 
+       if (rev != mc->hdr.patch_id)
+-              return -1;
++              return false;
+ 
+-      return 0;
++      return true;
+ }
+ 
+ /*
+@@ -544,7 +544,7 @@ static bool early_apply_microcode(u32 ol
+       if (old_rev > mc->hdr.patch_id)
+               return ret;
+ 
+-      return !__apply_microcode_amd(mc, desc.psize);
++      return __apply_microcode_amd(mc, desc.psize);
+ }
+ 
+ static bool get_builtin_microcode(struct cpio_data *cp)
+@@ -763,7 +763,7 @@ void reload_ucode_amd(unsigned int cpu)
+       rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+ 
+       if (rev < mc->hdr.patch_id) {
+-              if (!__apply_microcode_amd(mc, p->size))
++              if (__apply_microcode_amd(mc, p->size))
+                       pr_info_once("reload revision: 0x%08x\n", mc->hdr.patch_id);
+       }
+ }
+@@ -816,7 +816,7 @@ static enum ucode_state apply_microcode_
+               goto out;
+       }
+ 
+-      if (__apply_microcode_amd(mc_amd, p->size)) {
++      if (!__apply_microcode_amd(mc_amd, p->size)) {
+               pr_err("CPU%d: update failed for patch_level=0x%08x\n",
+                       cpu, mc_amd->hdr.patch_id);
+               return UCODE_ERROR;

diff --git a/queue-6.12/x86-microcode-amd-load-only-sha256-checksummed-patches.patch b/queue-6.12/x86-microcode-amd-load-only-sha256-checksummed-patches.patch
new file mode 100644 (file)
index 0000000..4f03751
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-load-only-sha256-checksummed-patches.patch
@@ -0,0 +1,639 @@
+From 3c3f3747456789d246ef6e2327481918bc9fdea7 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Thu, 23 Jan 2025 14:44:53 +0100
+Subject: x86/microcode/AMD: Load only SHA256-checksummed patches
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit 50cef76d5cb0e199cda19f026842560f6eedc4f7 upstream.
+
+Load patches for which the driver carries a SHA256 checksum of the patch
+blob.
+
+This can be disabled by adding "microcode.amd_sha_check=off" on the
+kernel cmdline. But it is highly NOT recommended.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/Kconfig                         |    1 
+ arch/x86/kernel/cpu/microcode/amd.c      |  111 +++++++
+ arch/x86/kernel/cpu/microcode/amd_shas.c |  444 +++++++++++++++++++++++++++++++
+ 3 files changed, 554 insertions(+), 2 deletions(-)
+ create mode 100644 arch/x86/kernel/cpu/microcode/amd_shas.c
+
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -1333,6 +1333,7 @@ config X86_REBOOTFIXUPS
+ config MICROCODE
+       def_bool y
+       depends on CPU_SUP_AMD || CPU_SUP_INTEL
++      select CRYPTO_LIB_SHA256 if CPU_SUP_AMD
+ 
+ config MICROCODE_INITRD32
+       def_bool y
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -23,14 +23,18 @@
+ 
+ #include <linux/earlycpio.h>
+ #include <linux/firmware.h>
++#include <linux/bsearch.h>
+ #include <linux/uaccess.h>
+ #include <linux/vmalloc.h>
+ #include <linux/initrd.h>
+ #include <linux/kernel.h>
+ #include <linux/pci.h>
+ 
++#include <crypto/sha2.h>
++
+ #include <asm/microcode.h>
+ #include <asm/processor.h>
++#include <asm/cmdline.h>
+ #include <asm/setup.h>
+ #include <asm/cpu.h>
+ #include <asm/msr.h>
+@@ -145,6 +149,98 @@ ucode_path[] __maybe_unused = "kernel/x8
+  */
+ static u32 bsp_cpuid_1_eax __ro_after_init;
+ 
++static bool sha_check = true;
++
++struct patch_digest {
++      u32 patch_id;
++      u8 sha256[SHA256_DIGEST_SIZE];
++};
++
++#include "amd_shas.c"
++
++static int cmp_id(const void *key, const void *elem)
++{
++      struct patch_digest *pd = (struct patch_digest *)elem;
++      u32 patch_id = *(u32 *)key;
++
++      if (patch_id == pd->patch_id)
++              return 0;
++      else if (patch_id < pd->patch_id)
++              return -1;
++      else
++              return 1;
++}
++
++static bool need_sha_check(u32 cur_rev)
++{
++      switch (cur_rev >> 8) {
++      case 0x80012: return cur_rev <= 0x800126f; break;
++      case 0x83010: return cur_rev <= 0x830107c; break;
++      case 0x86001: return cur_rev <= 0x860010e; break;
++      case 0x86081: return cur_rev <= 0x8608108; break;
++      case 0x87010: return cur_rev <= 0x8701034; break;
++      case 0x8a000: return cur_rev <= 0x8a0000a; break;
++      case 0xa0011: return cur_rev <= 0xa0011da; break;
++      case 0xa0012: return cur_rev <= 0xa001243; break;
++      case 0xa1011: return cur_rev <= 0xa101153; break;
++      case 0xa1012: return cur_rev <= 0xa10124e; break;
++      case 0xa1081: return cur_rev <= 0xa108109; break;
++      case 0xa2010: return cur_rev <= 0xa20102f; break;
++      case 0xa2012: return cur_rev <= 0xa201212; break;
++      case 0xa6012: return cur_rev <= 0xa60120a; break;
++      case 0xa7041: return cur_rev <= 0xa704109; break;
++      case 0xa7052: return cur_rev <= 0xa705208; break;
++      case 0xa7080: return cur_rev <= 0xa708009; break;
++      case 0xa70c0: return cur_rev <= 0xa70C009; break;
++      case 0xaa002: return cur_rev <= 0xaa00218; break;
++      default: break;
++      }
++
++      pr_info("You should not be seeing this. Please send the following couple of lines to x86-<at>-kernel.org\n");
++      pr_info("CPUID(1).EAX: 0x%x, current revision: 0x%x\n", bsp_cpuid_1_eax, cur_rev);
++      return true;
++}
++
++static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsigned int len)
++{
++      struct patch_digest *pd = NULL;
++      u8 digest[SHA256_DIGEST_SIZE];
++      struct sha256_state s;
++      int i;
++
++      if (x86_family(bsp_cpuid_1_eax) < 0x17 ||
++          x86_family(bsp_cpuid_1_eax) > 0x19)
++              return true;
++
++      if (!need_sha_check(cur_rev))
++              return true;
++
++      if (!sha_check)
++              return true;
++
++      pd = bsearch(&patch_id, phashes, ARRAY_SIZE(phashes), sizeof(struct patch_digest), cmp_id);
++      if (!pd) {
++              pr_err("No sha256 digest for patch ID: 0x%x found\n", patch_id);
++              return false;
++      }
++
++      sha256_init(&s);
++      sha256_update(&s, data, len);
++      sha256_final(&s, digest);
++
++      if (memcmp(digest, pd->sha256, sizeof(digest))) {
++              pr_err("Patch 0x%x SHA256 digest mismatch!\n", patch_id);
++
++              for (i = 0; i < SHA256_DIGEST_SIZE; i++)
++                      pr_cont("0x%x ", digest[i]);
++              pr_info("\n");
++
++              return false;
++      }
++
++      return true;
++}
++
+ static u32 get_patch_level(void)
+ {
+       u32 rev, dummy __always_unused;
+@@ -497,6 +593,9 @@ static bool __apply_microcode_amd(struct
+ {
+       unsigned long p_addr = (unsigned long)&mc->hdr.data_code;
+ 
++      if (!verify_sha256_digest(mc->hdr.patch_id, *cur_rev, (const u8 *)p_addr, psize))
++              return -1;
++
+       native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr);
+ 
+       if (x86_family(bsp_cpuid_1_eax) == 0x17) {
+@@ -572,8 +671,17 @@ void __init load_ucode_amd_bsp(struct ea
+       struct cont_desc desc = { };
+       struct microcode_amd *mc;
+       struct cpio_data cp = { };
++      char buf[4];
+       u32 rev;
+ 
++      if (cmdline_find_option(boot_command_line, "microcode.amd_sha_check", buf, 4)) {
++              if (!strncmp(buf, "off", 3)) {
++                      sha_check = false;
++                      pr_warn_once("It is a very very bad idea to disable the blobs SHA check!\n");
++                      add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
++              }
++      }
++
+       bsp_cpuid_1_eax = cpuid_1_eax;
+ 
+       rev = get_patch_level();
+@@ -903,8 +1011,7 @@ static int verify_and_add_patch(u8 famil
+ }
+ 
+ /* Scan the blob in @data and add microcode patches to the cache. */
+-static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
+-                                           size_t size)
++static enum ucode_state __load_microcode_amd(u8 family, const u8 *data, size_t size)
+ {
+       u8 *fw = (u8 *)data;
+       size_t offset;
+--- /dev/null
++++ b/arch/x86/kernel/cpu/microcode/amd_shas.c
+@@ -0,0 +1,444 @@
++/* Keep 'em sorted. */
++static const struct patch_digest phashes[] = {
++ { 0x8001227, {
++              0x99,0xc0,0x9b,0x2b,0xcc,0x9f,0x52,0x1b,
++              0x1a,0x5f,0x1d,0x83,0xa1,0x6c,0xc4,0x46,
++              0xe2,0x6c,0xda,0x73,0xfb,0x2d,0x23,0xa8,
++              0x77,0xdc,0x15,0x31,0x33,0x4a,0x46,0x18,
++      }
++ },
++ { 0x8001250, {
++              0xc0,0x0b,0x6b,0x19,0xfd,0x5c,0x39,0x60,
++              0xd5,0xc3,0x57,0x46,0x54,0xe4,0xd1,0xaa,
++              0xa8,0xf7,0x1f,0xa8,0x6a,0x60,0x3e,0xe3,
++              0x27,0x39,0x8e,0x53,0x30,0xf8,0x49,0x19,
++      }
++ },
++ { 0x800126e, {
++              0xf3,0x8b,0x2b,0xb6,0x34,0xe3,0xc8,0x2c,
++              0xef,0xec,0x63,0x6d,0xc8,0x76,0x77,0xb3,
++              0x25,0x5a,0xb7,0x52,0x8c,0x83,0x26,0xe6,
++              0x4c,0xbe,0xbf,0xe9,0x7d,0x22,0x6a,0x43,
++      }
++ },
++ { 0x800126f, {
++              0x2b,0x5a,0xf2,0x9c,0xdd,0xd2,0x7f,0xec,
++              0xec,0x96,0x09,0x57,0xb0,0x96,0x29,0x8b,
++              0x2e,0x26,0x91,0xf0,0x49,0x33,0x42,0x18,
++              0xdd,0x4b,0x65,0x5a,0xd4,0x15,0x3d,0x33,
++      }
++ },
++ { 0x800820d, {
++              0x68,0x98,0x83,0xcd,0x22,0x0d,0xdd,0x59,
++              0x73,0x2c,0x5b,0x37,0x1f,0x84,0x0e,0x67,
++              0x96,0x43,0x83,0x0c,0x46,0x44,0xab,0x7c,
++              0x7b,0x65,0x9e,0x57,0xb5,0x90,0x4b,0x0e,
++      }
++ },
++ { 0x8301025, {
++              0xe4,0x7d,0xdb,0x1e,0x14,0xb4,0x5e,0x36,
++              0x8f,0x3e,0x48,0x88,0x3c,0x6d,0x76,0xa1,
++              0x59,0xc6,0xc0,0x72,0x42,0xdf,0x6c,0x30,
++              0x6f,0x0b,0x28,0x16,0x61,0xfc,0x79,0x77,
++      }
++ },
++ { 0x8301055, {
++              0x81,0x7b,0x99,0x1b,0xae,0x2d,0x4f,0x9a,
++              0xef,0x13,0xce,0xb5,0x10,0xaf,0x6a,0xea,
++              0xe5,0xb0,0x64,0x98,0x10,0x68,0x34,0x3b,
++              0x9d,0x7a,0xd6,0x22,0x77,0x5f,0xb3,0x5b,
++      }
++ },
++ { 0x8301072, {
++              0xcf,0x76,0xa7,0x1a,0x49,0xdf,0x2a,0x5e,
++              0x9e,0x40,0x70,0xe5,0xdd,0x8a,0xa8,0x28,
++              0x20,0xdc,0x91,0xd8,0x2c,0xa6,0xa0,0xb1,
++              0x2d,0x22,0x26,0x94,0x4b,0x40,0x85,0x30,
++      }
++ },
++ { 0x830107a, {
++              0x2a,0x65,0x8c,0x1a,0x5e,0x07,0x21,0x72,
++              0xdf,0x90,0xa6,0x51,0x37,0xd3,0x4b,0x34,
++              0xc4,0xda,0x03,0xe1,0x8a,0x6c,0xfb,0x20,
++              0x04,0xb2,0x81,0x05,0xd4,0x87,0xf4,0x0a,
++      }
++ },
++ { 0x830107b, {
++              0xb3,0x43,0x13,0x63,0x56,0xc1,0x39,0xad,
++              0x10,0xa6,0x2b,0xcc,0x02,0xe6,0x76,0x2a,
++              0x1e,0x39,0x58,0x3e,0x23,0x6e,0xa4,0x04,
++              0x95,0xea,0xf9,0x6d,0xc2,0x8a,0x13,0x19,
++      }
++ },
++ { 0x830107c, {
++              0x21,0x64,0xde,0xfb,0x9f,0x68,0x96,0x47,
++              0x70,0x5c,0xe2,0x8f,0x18,0x52,0x6a,0xac,
++              0xa4,0xd2,0x2e,0xe0,0xde,0x68,0x66,0xc3,
++              0xeb,0x1e,0xd3,0x3f,0xbc,0x51,0x1d,0x38,
++      }
++ },
++ { 0x860010d, {
++              0x86,0xb6,0x15,0x83,0xbc,0x3b,0x9c,0xe0,
++              0xb3,0xef,0x1d,0x99,0x84,0x35,0x15,0xf7,
++              0x7c,0x2a,0xc6,0x42,0xdb,0x73,0x07,0x5c,
++              0x7d,0xc3,0x02,0xb5,0x43,0x06,0x5e,0xf8,
++      }
++ },
++ { 0x8608108, {
++              0x14,0xfe,0x57,0x86,0x49,0xc8,0x68,0xe2,
++              0x11,0xa3,0xcb,0x6e,0xff,0x6e,0xd5,0x38,
++              0xfe,0x89,0x1a,0xe0,0x67,0xbf,0xc4,0xcc,
++              0x1b,0x9f,0x84,0x77,0x2b,0x9f,0xaa,0xbd,
++      }
++ },
++ { 0x8701034, {
++              0xc3,0x14,0x09,0xa8,0x9c,0x3f,0x8d,0x83,
++              0x9b,0x4c,0xa5,0xb7,0x64,0x8b,0x91,0x5d,
++              0x85,0x6a,0x39,0x26,0x1e,0x14,0x41,0xa8,
++              0x75,0xea,0xa6,0xf9,0xc9,0xd1,0xea,0x2b,
++      }
++ },
++ { 0x8a00008, {
++              0xd7,0x2a,0x93,0xdc,0x05,0x2f,0xa5,0x6e,
++              0x0c,0x61,0x2c,0x07,0x9f,0x38,0xe9,0x8e,
++              0xef,0x7d,0x2a,0x05,0x4d,0x56,0xaf,0x72,
++              0xe7,0x56,0x47,0x6e,0x60,0x27,0xd5,0x8c,
++      }
++ },
++ { 0x8a0000a, {
++              0x73,0x31,0x26,0x22,0xd4,0xf9,0xee,0x3c,
++              0x07,0x06,0xe7,0xb9,0xad,0xd8,0x72,0x44,
++              0x33,0x31,0xaa,0x7d,0xc3,0x67,0x0e,0xdb,
++              0x47,0xb5,0xaa,0xbc,0xf5,0xbb,0xd9,0x20,
++      }
++ },
++ { 0xa00104c, {
++              0x3c,0x8a,0xfe,0x04,0x62,0xd8,0x6d,0xbe,
++              0xa7,0x14,0x28,0x64,0x75,0xc0,0xa3,0x76,
++              0xb7,0x92,0x0b,0x97,0x0a,0x8e,0x9c,0x5b,
++              0x1b,0xc8,0x9d,0x3a,0x1e,0x81,0x3d,0x3b,
++      }
++ },
++ { 0xa00104e, {
++              0xc4,0x35,0x82,0x67,0xd2,0x86,0xe5,0xb2,
++              0xfd,0x69,0x12,0x38,0xc8,0x77,0xba,0xe0,
++              0x70,0xf9,0x77,0x89,0x10,0xa6,0x74,0x4e,
++              0x56,0x58,0x13,0xf5,0x84,0x70,0x28,0x0b,
++      }
++ },
++ { 0xa001053, {
++              0x92,0x0e,0xf4,0x69,0x10,0x3b,0xf9,0x9d,
++              0x31,0x1b,0xa6,0x99,0x08,0x7d,0xd7,0x25,
++              0x7e,0x1e,0x89,0xba,0x35,0x8d,0xac,0xcb,
++              0x3a,0xb4,0xdf,0x58,0x12,0xcf,0xc0,0xc3,
++      }
++ },
++ { 0xa001058, {
++              0x33,0x7d,0xa9,0xb5,0x4e,0x62,0x13,0x36,
++              0xef,0x66,0xc9,0xbd,0x0a,0xa6,0x3b,0x19,
++              0xcb,0xf5,0xc2,0xc3,0x55,0x47,0x20,0xec,
++              0x1f,0x7b,0xa1,0x44,0x0e,0x8e,0xa4,0xb2,
++      }
++ },
++ { 0xa001075, {
++              0x39,0x02,0x82,0xd0,0x7c,0x26,0x43,0xe9,
++              0x26,0xa3,0xd9,0x96,0xf7,0x30,0x13,0x0a,
++              0x8a,0x0e,0xac,0xe7,0x1d,0xdc,0xe2,0x0f,
++              0xcb,0x9e,0x8d,0xbc,0xd2,0xa2,0x44,0xe0,
++      }
++ },
++ { 0xa001078, {
++              0x2d,0x67,0xc7,0x35,0xca,0xef,0x2f,0x25,
++              0x4c,0x45,0x93,0x3f,0x36,0x01,0x8c,0xce,
++              0xa8,0x5b,0x07,0xd3,0xc1,0x35,0x3c,0x04,
++              0x20,0xa2,0xfc,0xdc,0xe6,0xce,0x26,0x3e,
++      }
++ },
++ { 0xa001079, {
++              0x43,0xe2,0x05,0x9c,0xfd,0xb7,0x5b,0xeb,
++              0x5b,0xe9,0xeb,0x3b,0x96,0xf4,0xe4,0x93,
++              0x73,0x45,0x3e,0xac,0x8d,0x3b,0xe4,0xdb,
++              0x10,0x31,0xc1,0xe4,0xa2,0xd0,0x5a,0x8a,
++      }
++ },
++ { 0xa00107a, {
++              0x5f,0x92,0xca,0xff,0xc3,0x59,0x22,0x5f,
++              0x02,0xa0,0x91,0x3b,0x4a,0x45,0x10,0xfd,
++              0x19,0xe1,0x8a,0x6d,0x9a,0x92,0xc1,0x3f,
++              0x75,0x78,0xac,0x78,0x03,0x1d,0xdb,0x18,
++      }
++ },
++ { 0xa001143, {
++              0x56,0xca,0xf7,0x43,0x8a,0x4c,0x46,0x80,
++              0xec,0xde,0xe5,0x9c,0x50,0x84,0x9a,0x42,
++              0x27,0xe5,0x51,0x84,0x8f,0x19,0xc0,0x8d,
++              0x0c,0x25,0xb4,0xb0,0x8f,0x10,0xf3,0xf8,
++      }
++ },
++ { 0xa001144, {
++              0x42,0xd5,0x9b,0xa7,0xd6,0x15,0x29,0x41,
++              0x61,0xc4,0x72,0x3f,0xf3,0x06,0x78,0x4b,
++              0x65,0xf3,0x0e,0xfa,0x9c,0x87,0xde,0x25,
++              0xbd,0xb3,0x9a,0xf4,0x75,0x13,0x53,0xdc,
++      }
++ },
++ { 0xa00115d, {
++              0xd4,0xc4,0x49,0x36,0x89,0x0b,0x47,0xdd,
++              0xfb,0x2f,0x88,0x3b,0x5f,0xf2,0x8e,0x75,
++              0xc6,0x6c,0x37,0x5a,0x90,0x25,0x94,0x3e,
++              0x36,0x9c,0xae,0x02,0x38,0x6c,0xf5,0x05,
++      }
++ },
++ { 0xa001173, {
++              0x28,0xbb,0x9b,0xd1,0xa0,0xa0,0x7e,0x3a,
++              0x59,0x20,0xc0,0xa9,0xb2,0x5c,0xc3,0x35,
++              0x53,0x89,0xe1,0x4c,0x93,0x2f,0x1d,0xc3,
++              0xe5,0xf7,0xf3,0xc8,0x9b,0x61,0xaa,0x9e,
++      }
++ },
++ { 0xa0011a8, {
++              0x97,0xc6,0x16,0x65,0x99,0xa4,0x85,0x3b,
++              0xf6,0xce,0xaa,0x49,0x4a,0x3a,0xc5,0xb6,
++              0x78,0x25,0xbc,0x53,0xaf,0x5d,0xcf,0xf4,
++              0x23,0x12,0xbb,0xb1,0xbc,0x8a,0x02,0x2e,
++      }
++ },
++ { 0xa0011ce, {
++              0xcf,0x1c,0x90,0xa3,0x85,0x0a,0xbf,0x71,
++              0x94,0x0e,0x80,0x86,0x85,0x4f,0xd7,0x86,
++              0xae,0x38,0x23,0x28,0x2b,0x35,0x9b,0x4e,
++              0xfe,0xb8,0xcd,0x3d,0x3d,0x39,0xc9,0x6a,
++      }
++ },
++ { 0xa0011d1, {
++              0xdf,0x0e,0xca,0xde,0xf6,0xce,0x5c,0x1e,
++              0x4c,0xec,0xd7,0x71,0x83,0xcc,0xa8,0x09,
++              0xc7,0xc5,0xfe,0xb2,0xf7,0x05,0xd2,0xc5,
++              0x12,0xdd,0xe4,0xf3,0x92,0x1c,0x3d,0xb8,
++      }
++ },
++ { 0xa0011d3, {
++              0x91,0xe6,0x10,0xd7,0x57,0xb0,0x95,0x0b,
++              0x9a,0x24,0xee,0xf7,0xcf,0x56,0xc1,0xa6,
++              0x4a,0x52,0x7d,0x5f,0x9f,0xdf,0xf6,0x00,
++              0x65,0xf7,0xea,0xe8,0x2a,0x88,0xe2,0x26,
++      }
++ },
++ { 0xa0011d5, {
++              0xed,0x69,0x89,0xf4,0xeb,0x64,0xc2,0x13,
++              0xe0,0x51,0x1f,0x03,0x26,0x52,0x7d,0xb7,
++              0x93,0x5d,0x65,0xca,0xb8,0x12,0x1d,0x62,
++              0x0d,0x5b,0x65,0x34,0x69,0xb2,0x62,0x21,
++      }
++ },
++ { 0xa001223, {
++              0xfb,0x32,0x5f,0xc6,0x83,0x4f,0x8c,0xb8,
++              0xa4,0x05,0xf9,0x71,0x53,0x01,0x16,0xc4,
++              0x83,0x75,0x94,0xdd,0xeb,0x7e,0xb7,0x15,
++              0x8e,0x3b,0x50,0x29,0x8a,0x9c,0xcc,0x45,
++      }
++ },
++ { 0xa001224, {
++              0x0e,0x0c,0xdf,0xb4,0x89,0xee,0x35,0x25,
++              0xdd,0x9e,0xdb,0xc0,0x69,0x83,0x0a,0xad,
++              0x26,0xa9,0xaa,0x9d,0xfc,0x3c,0xea,0xf9,
++              0x6c,0xdc,0xd5,0x6d,0x8b,0x6e,0x85,0x4a,
++      }
++ },
++ { 0xa001227, {
++              0xab,0xc6,0x00,0x69,0x4b,0x50,0x87,0xad,
++              0x5f,0x0e,0x8b,0xea,0x57,0x38,0xce,0x1d,
++              0x0f,0x75,0x26,0x02,0xf6,0xd6,0x96,0xe9,
++              0x87,0xb9,0xd6,0x20,0x27,0x7c,0xd2,0xe0,
++      }
++ },
++ { 0xa001229, {
++              0x7f,0x49,0x49,0x48,0x46,0xa5,0x50,0xa6,
++              0x28,0x89,0x98,0xe2,0x9e,0xb4,0x7f,0x75,
++              0x33,0xa7,0x04,0x02,0xe4,0x82,0xbf,0xb4,
++              0xa5,0x3a,0xba,0x24,0x8d,0x31,0x10,0x1d,
++      }
++ },
++ { 0xa00122e, {
++              0x56,0x94,0xa9,0x5d,0x06,0x68,0xfe,0xaf,
++              0xdf,0x7a,0xff,0x2d,0xdf,0x74,0x0f,0x15,
++              0x66,0xfb,0x00,0xb5,0x51,0x97,0x9b,0xfa,
++              0xcb,0x79,0x85,0x46,0x25,0xb4,0xd2,0x10,
++      }
++ },
++ { 0xa001231, {
++              0x0b,0x46,0xa5,0xfc,0x18,0x15,0xa0,0x9e,
++              0xa6,0xdc,0xb7,0xff,0x17,0xf7,0x30,0x64,
++              0xd4,0xda,0x9e,0x1b,0xc3,0xfc,0x02,0x3b,
++              0xe2,0xc6,0x0e,0x41,0x54,0xb5,0x18,0xdd,
++      }
++ },
++ { 0xa001234, {
++              0x88,0x8d,0xed,0xab,0xb5,0xbd,0x4e,0xf7,
++              0x7f,0xd4,0x0e,0x95,0x34,0x91,0xff,0xcc,
++              0xfb,0x2a,0xcd,0xf7,0xd5,0xdb,0x4c,0x9b,
++              0xd6,0x2e,0x73,0x50,0x8f,0x83,0x79,0x1a,
++      }
++ },
++ { 0xa001236, {
++              0x3d,0x30,0x00,0xb9,0x71,0xba,0x87,0x78,
++              0xa8,0x43,0x55,0xc4,0x26,0x59,0xcf,0x9d,
++              0x93,0xce,0x64,0x0e,0x8b,0x72,0x11,0x8b,
++              0xa3,0x8f,0x51,0xe9,0xca,0x98,0xaa,0x25,
++      }
++ },
++ { 0xa001238, {
++              0x72,0xf7,0x4b,0x0c,0x7d,0x58,0x65,0xcc,
++              0x00,0xcc,0x57,0x16,0x68,0x16,0xf8,0x2a,
++              0x1b,0xb3,0x8b,0xe1,0xb6,0x83,0x8c,0x7e,
++              0xc0,0xcd,0x33,0xf2,0x8d,0xf9,0xef,0x59,
++      }
++ },
++ { 0xa00820c, {
++              0xa8,0x0c,0x81,0xc0,0xa6,0x00,0xe7,0xf3,
++              0x5f,0x65,0xd3,0xb9,0x6f,0xea,0x93,0x63,
++              0xf1,0x8c,0x88,0x45,0xd7,0x82,0x80,0xd1,
++              0xe1,0x3b,0x8d,0xb2,0xf8,0x22,0x03,0xe2,
++      }
++ },
++ { 0xa10113e, {
++              0x05,0x3c,0x66,0xd7,0xa9,0x5a,0x33,0x10,
++              0x1b,0xf8,0x9c,0x8f,0xed,0xfc,0xa7,0xa0,
++              0x15,0xe3,0x3f,0x4b,0x1d,0x0d,0x0a,0xd5,
++              0xfa,0x90,0xc4,0xed,0x9d,0x90,0xaf,0x53,
++      }
++ },
++ { 0xa101144, {
++              0xb3,0x0b,0x26,0x9a,0xf8,0x7c,0x02,0x26,
++              0x35,0x84,0x53,0xa4,0xd3,0x2c,0x7c,0x09,
++              0x68,0x7b,0x96,0xb6,0x93,0xef,0xde,0xbc,
++              0xfd,0x4b,0x15,0xd2,0x81,0xd3,0x51,0x47,
++      }
++ },
++ { 0xa101148, {
++              0x20,0xd5,0x6f,0x40,0x4a,0xf6,0x48,0x90,
++              0xc2,0x93,0x9a,0xc2,0xfd,0xac,0xef,0x4f,
++              0xfa,0xc0,0x3d,0x92,0x3c,0x6d,0x01,0x08,
++              0xf1,0x5e,0xb0,0xde,0xb4,0x98,0xae,0xc4,
++      }
++ },
++ { 0xa10123e, {
++              0x03,0xb9,0x2c,0x76,0x48,0x93,0xc9,0x18,
++              0xfb,0x56,0xfd,0xf7,0xe2,0x1d,0xca,0x4d,
++              0x1d,0x13,0x53,0x63,0xfe,0x42,0x6f,0xfc,
++              0x19,0x0f,0xf1,0xfc,0xa7,0xdd,0x89,0x1b,
++      }
++ },
++ { 0xa101244, {
++              0x71,0x56,0xb5,0x9f,0x21,0xbf,0xb3,0x3c,
++              0x8c,0xd7,0x36,0xd0,0x34,0x52,0x1b,0xb1,
++              0x46,0x2f,0x04,0xf0,0x37,0xd8,0x1e,0x72,
++              0x24,0xa2,0x80,0x84,0x83,0x65,0x84,0xc0,
++      }
++ },
++ { 0xa101248, {
++              0xed,0x3b,0x95,0xa6,0x68,0xa7,0x77,0x3e,
++              0xfc,0x17,0x26,0xe2,0x7b,0xd5,0x56,0x22,
++              0x2c,0x1d,0xef,0xeb,0x56,0xdd,0xba,0x6e,
++              0x1b,0x7d,0x64,0x9d,0x4b,0x53,0x13,0x75,
++      }
++ },
++ { 0xa108108, {
++              0xed,0xc2,0xec,0xa1,0x15,0xc6,0x65,0xe9,
++              0xd0,0xef,0x39,0xaa,0x7f,0x55,0x06,0xc6,
++              0xf5,0xd4,0x3f,0x7b,0x14,0xd5,0x60,0x2c,
++              0x28,0x1e,0x9c,0x59,0x69,0x99,0x4d,0x16,
++      }
++ },
++ { 0xa20102d, {
++              0xf9,0x6e,0xf2,0x32,0xd3,0x0f,0x5f,0x11,
++              0x59,0xa1,0xfe,0xcc,0xcd,0x9b,0x42,0x89,
++              0x8b,0x89,0x2f,0xb5,0xbb,0x82,0xef,0x23,
++              0x8c,0xe9,0x19,0x3e,0xcc,0x3f,0x7b,0xb4,
++      }
++ },
++ { 0xa201210, {
++              0xe8,0x6d,0x51,0x6a,0x8e,0x72,0xf3,0xfe,
++              0x6e,0x16,0xbc,0x62,0x59,0x40,0x17,0xe9,
++              0x6d,0x3d,0x0e,0x6b,0xa7,0xac,0xe3,0x68,
++              0xf7,0x55,0xf0,0x13,0xbb,0x22,0xf6,0x41,
++      }
++ },
++ { 0xa404107, {
++              0xbb,0x04,0x4e,0x47,0xdd,0x5e,0x26,0x45,
++              0x1a,0xc9,0x56,0x24,0xa4,0x4c,0x82,0xb0,
++              0x8b,0x0d,0x9f,0xf9,0x3a,0xdf,0xc6,0x81,
++              0x13,0xbc,0xc5,0x25,0xe4,0xc5,0xc3,0x99,
++      }
++ },
++ { 0xa500011, {
++              0x23,0x3d,0x70,0x7d,0x03,0xc3,0xc4,0xf4,
++              0x2b,0x82,0xc6,0x05,0xda,0x80,0x0a,0xf1,
++              0xd7,0x5b,0x65,0x3a,0x7d,0xab,0xdf,0xa2,
++              0x11,0x5e,0x96,0x7e,0x71,0xe9,0xfc,0x74,
++      }
++ },
++ { 0xa601209, {
++              0x66,0x48,0xd4,0x09,0x05,0xcb,0x29,0x32,
++              0x66,0xb7,0x9a,0x76,0xcd,0x11,0xf3,0x30,
++              0x15,0x86,0xcc,0x5d,0x97,0x0f,0xc0,0x46,
++              0xe8,0x73,0xe2,0xd6,0xdb,0xd2,0x77,0x1d,
++      }
++ },
++ { 0xa704107, {
++              0xf3,0xc6,0x58,0x26,0xee,0xac,0x3f,0xd6,
++              0xce,0xa1,0x72,0x47,0x3b,0xba,0x2b,0x93,
++              0x2a,0xad,0x8e,0x6b,0xea,0x9b,0xb7,0xc2,
++              0x64,0x39,0x71,0x8c,0xce,0xe7,0x41,0x39,
++      }
++ },
++ { 0xa705206, {
++              0x8d,0xc0,0x76,0xbd,0x58,0x9f,0x8f,0xa4,
++              0x12,0x9d,0x21,0xfb,0x48,0x21,0xbc,0xe7,
++              0x67,0x6f,0x04,0x18,0xae,0x20,0x87,0x4b,
++              0x03,0x35,0xe9,0xbe,0xfb,0x06,0xdf,0xfc,
++      }
++ },
++ { 0xa708007, {
++              0x6b,0x76,0xcc,0x78,0xc5,0x8a,0xa3,0xe3,
++              0x32,0x2d,0x79,0xe4,0xc3,0x80,0xdb,0xb2,
++              0x07,0xaa,0x3a,0xe0,0x57,0x13,0x72,0x80,
++              0xdf,0x92,0x73,0x84,0x87,0x3c,0x73,0x93,
++      }
++ },
++ { 0xa70c005, {
++              0x88,0x5d,0xfb,0x79,0x64,0xd8,0x46,0x3b,
++              0x4a,0x83,0x8e,0x77,0x7e,0xcf,0xb3,0x0f,
++              0x1f,0x1f,0xf1,0x97,0xeb,0xfe,0x56,0x55,
++              0xee,0x49,0xac,0xe1,0x8b,0x13,0xc5,0x13,
++      }
++ },
++ { 0xaa00116, {
++              0xe8,0x4c,0x2c,0x88,0xa1,0xac,0x24,0x63,
++              0x65,0xe5,0xaa,0x2d,0x16,0xa9,0xc3,0xf5,
++              0xfe,0x1d,0x5e,0x65,0xc7,0xaa,0x92,0x4d,
++              0x91,0xee,0x76,0xbb,0x4c,0x66,0x78,0xc9,
++      }
++ },
++ { 0xaa00212, {
++              0xbd,0x57,0x5d,0x0a,0x0a,0x30,0xc1,0x75,
++              0x95,0x58,0x5e,0x93,0x02,0x28,0x43,0x71,
++              0xed,0x42,0x29,0xc8,0xec,0x34,0x2b,0xb2,
++              0x1a,0x65,0x4b,0xfe,0x07,0x0f,0x34,0xa1,
++      }
++ },
++ { 0xaa00213, {
++              0xed,0x58,0xb7,0x76,0x81,0x7f,0xd9,0x3a,
++              0x1a,0xff,0x8b,0x34,0xb8,0x4a,0x99,0x0f,
++              0x28,0x49,0x6c,0x56,0x2b,0xdc,0xb7,0xed,
++              0x96,0xd5,0x9d,0xc1,0x7a,0xd4,0x51,0x9b,
++      }
++ },
++ { 0xaa00215, {
++              0x55,0xd3,0x28,0xcb,0x87,0xa9,0x32,0xe9,
++              0x4e,0x85,0x4b,0x7c,0x6b,0xd5,0x7c,0xd4,
++              0x1b,0x51,0x71,0x3a,0x0e,0x0b,0xdc,0x9b,
++              0x68,0x2f,0x46,0xee,0xfe,0xc6,0x6d,0xef,
++      }
++ },
++};

diff --git a/queue-6.12/x86-microcode-amd-merge-early_apply_microcode-into-its-single-callsite.patch b/queue-6.12/x86-microcode-amd-merge-early_apply_microcode-into-its-single-callsite.patch
new file mode 100644 (file)
index 0000000..9fde770
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-merge-early_apply_microcode-into-its-single-callsite.patch
@@ -0,0 +1,104 @@
+From ac9ac13b9c8284a16e645709ea94d7ccc511ec22 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Thu, 23 Jan 2025 12:46:45 +0100
+Subject: x86/microcode/AMD: Merge early_apply_microcode() into its single callsite
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit dc15675074dcfd79a2f10a6e39f96b0244961a01 upstream.
+
+No functional changes.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lore.kernel.org/r/20250211163648.30531-4-bp@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c |   60 +++++++++++++++---------------------
+ 1 file changed, 26 insertions(+), 34 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -512,39 +512,6 @@ static bool __apply_microcode_amd(struct
+       return true;
+ }
+ 
+-/*
+- * Early load occurs before we can vmalloc(). So we look for the microcode
+- * patch container file in initrd, traverse equivalent cpu table, look for a
+- * matching microcode patch, and update, all in initrd memory in place.
+- * When vmalloc() is available for use later -- on 64-bit during first AP load,
+- * and on 32-bit during save_microcode_in_initrd() -- we can call
+- * load_microcode_amd() to save equivalent cpu table and microcode patches in
+- * kernel heap memory.
+- *
+- * Returns true if container found (sets @desc), false otherwise.
+- */
+-static bool early_apply_microcode(u32 old_rev, void *ucode, size_t size)
+-{
+-      struct cont_desc desc = { 0 };
+-      struct microcode_amd *mc;
+-      bool ret = false;
+-
+-      scan_containers(ucode, size, &desc);
+-
+-      mc = desc.mc;
+-      if (!mc)
+-              return ret;
+-
+-      /*
+-       * Allow application of the same revision to pick up SMT-specific
+-       * changes even if the revision of the other SMT thread is already
+-       * up-to-date.
+-       */
+-      if (old_rev > mc->hdr.patch_id)
+-              return ret;
+-
+-      return __apply_microcode_amd(mc, desc.psize);
+-}
+ 
+ static bool get_builtin_microcode(struct cpio_data *cp)
+ {
+@@ -583,8 +550,19 @@ static bool __init find_blobs_in_contain
+       return found;
+ }
+ 
++/*
++ * Early load occurs before we can vmalloc(). So we look for the microcode
++ * patch container file in initrd, traverse equivalent cpu table, look for a
++ * matching microcode patch, and update, all in initrd memory in place.
++ * When vmalloc() is available for use later -- on 64-bit during first AP load,
++ * and on 32-bit during save_microcode_in_initrd() -- we can call
++ * load_microcode_amd() to save equivalent cpu table and microcode patches in
++ * kernel heap memory.
++ */
+ void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_eax)
+ {
++      struct cont_desc desc = { };
++      struct microcode_amd *mc;
+       struct cpio_data cp = { };
+       u32 dummy;
+ 
+@@ -598,7 +576,21 @@ void __init load_ucode_amd_bsp(struct ea
+       if (!find_blobs_in_containers(&cp))
+               return;
+ 
+-      if (early_apply_microcode(ed->old_rev, cp.data, cp.size))
++      scan_containers(cp.data, cp.size, &desc);
++
++      mc = desc.mc;
++      if (!mc)
++              return;
++
++      /*
++       * Allow application of the same revision to pick up SMT-specific
++       * changes even if the revision of the other SMT thread is already
++       * up-to-date.
++       */
++      if (ed->old_rev > mc->hdr.patch_id)
++              return;
++
++      if (__apply_microcode_amd(mc, desc.psize))
+               native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);
+ }
+ 

diff --git a/queue-6.12/x86-microcode-amd-remove-ugly-linebreak-in-__verify_patch_section-signature.patch b/queue-6.12/x86-microcode-amd-remove-ugly-linebreak-in-__verify_patch_section-signature.patch
new file mode 100644 (file)
index 0000000..d361312
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-remove-ugly-linebreak-in-__verify_patch_section-signature.patch
@@ -0,0 +1,31 @@
+From 24e4d91ed5b3f2caecd58f5a023540a105964bfd Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Thu, 23 Jan 2025 13:14:34 +0100
+Subject: x86/microcode/AMD: Remove ugly linebreak in __verify_patch_section() signature
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit 7103f0589ac220eac3d2b1e8411494b31b883d06 upstream.
+
+No functional changes.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lore.kernel.org/r/20250211163648.30531-2-bp@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c |    3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -246,8 +246,7 @@ static bool verify_equivalence_table(con
+  * On success, @sh_psize returns the patch size according to the section header,
+  * to the caller.
+  */
+-static bool
+-__verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize)
++static bool __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize)
+ {
+       u32 p_type, p_size;
+       const u32 *hdr;

diff --git a/queue-6.12/x86-microcode-amd-remove-unused-save_microcode_in_initrd_amd-declarations.patch b/queue-6.12/x86-microcode-amd-remove-unused-save_microcode_in_initrd_amd-declarations.patch
new file mode 100644 (file)
index 0000000..5cf1e56
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-remove-unused-save_microcode_in_initrd_amd-declarations.patch
@@ -0,0 +1,55 @@
+From 8623fd18a7d31f4d2d36d5623ed13bc383b7b8a7 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Thu, 23 Jan 2025 12:23:47 +0100
+Subject: x86/microcode/AMD: Remove unused save_microcode_in_initrd_amd() declarations
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+commit 3ef0740d10b005a45e8ae5b4b7b5d37bfddf63c0 upstream.
+
+Commit
+
+  a7939f016720 ("x86/microcode/amd: Cache builtin/initrd microcode early")
+
+renamed it to save_microcode_in_initrd() and made it static. Zap the
+forgotten declarations.
+
+No functional changes.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lore.kernel.org/r/20250211163648.30531-3-bp@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c      |    2 +-
+ arch/x86/kernel/cpu/microcode/internal.h |    2 --
+ 2 files changed, 1 insertion(+), 3 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -517,7 +517,7 @@ static bool __apply_microcode_amd(struct
+  * patch container file in initrd, traverse equivalent cpu table, look for a
+  * matching microcode patch, and update, all in initrd memory in place.
+  * When vmalloc() is available for use later -- on 64-bit during first AP load,
+- * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
++ * and on 32-bit during save_microcode_in_initrd() -- we can call
+  * load_microcode_amd() to save equivalent cpu table and microcode patches in
+  * kernel heap memory.
+  *
+--- a/arch/x86/kernel/cpu/microcode/internal.h
++++ b/arch/x86/kernel/cpu/microcode/internal.h
+@@ -100,14 +100,12 @@ extern bool force_minrev;
+ #ifdef CONFIG_CPU_SUP_AMD
+ void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family);
+ void load_ucode_amd_ap(unsigned int family);
+-int save_microcode_in_initrd_amd(unsigned int family);
+ void reload_ucode_amd(unsigned int cpu);
+ struct microcode_ops *init_amd_microcode(void);
+ void exit_amd_microcode(void);
+ #else /* CONFIG_CPU_SUP_AMD */
+ static inline void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family) { }
+ static inline void load_ucode_amd_ap(unsigned int family) { }
+-static inline int save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
+ static inline void reload_ucode_amd(unsigned int cpu) { }
+ static inline struct microcode_ops *init_amd_microcode(void) { return NULL; }
+ static inline void exit_amd_microcode(void) { }

diff --git a/queue-6.12/x86-microcode-amd-return-bool-from-find_blobs_in_containers.patch b/queue-6.12/x86-microcode-amd-return-bool-from-find_blobs_in_containers.patch
new file mode 100644 (file)
index 0000000..9f59fe4
--- /dev/null
+++ b/queue-6.12/x86-microcode-amd-return-bool-from-find_blobs_in_containers.patch
@@ -0,0 +1,69 @@
+From 1d1306735da9c173fcc0ee51e14e2d89a46ea215 Mon Sep 17 00:00:00 2001
+From: Nikolay Borisov <nik.borisov@suse.com>
+Date: Fri, 18 Oct 2024 18:51:49 +0300
+Subject: x86/microcode/AMD: Return bool from find_blobs_in_containers()
+
+From: Nikolay Borisov <nik.borisov@suse.com>
+
+commit a85c08aaa665b5436d325f6d7138732a0e1315ce upstream.
+
+Instead of open-coding the check for size/data move it inside the
+function and make it return a boolean indicating whether data was found
+or not.
+
+No functional changes.
+
+  [ bp: Write @ret in find_blobs_in_containers() only on success. ]
+
+Signed-off-by: Nikolay Borisov <nik.borisov@suse.com>
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Link: https://lore.kernel.org/r/20241018155151.702350-2-nik.borisov@suse.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/microcode/amd.c |   15 +++++++++------
+ 1 file changed, 9 insertions(+), 6 deletions(-)
+
+--- a/arch/x86/kernel/cpu/microcode/amd.c
++++ b/arch/x86/kernel/cpu/microcode/amd.c
+@@ -569,14 +569,19 @@ static bool get_builtin_microcode(struct
+       return false;
+ }
+ 
+-static void __init find_blobs_in_containers(struct cpio_data *ret)
++static bool __init find_blobs_in_containers(struct cpio_data *ret)
+ {
+       struct cpio_data cp;
++      bool found;
+ 
+       if (!get_builtin_microcode(&cp))
+               cp = find_microcode_in_initrd(ucode_path);
+ 
+-      *ret = cp;
++      found = cp.data && cp.size;
++      if (found)
++              *ret = cp;
++
++      return found;
+ }
+ 
+ void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_eax)
+@@ -591,8 +596,7 @@ void __init load_ucode_amd_bsp(struct ea
+       /* Needed in load_microcode_amd() */
+       ucode_cpu_info[0].cpu_sig.sig = cpuid_1_eax;
+ 
+-      find_blobs_in_containers(&cp);
+-      if (!(cp.data && cp.size))
++      if (!find_blobs_in_containers(&cp))
+               return;
+ 
+       if (early_apply_microcode(ed->old_rev, cp.data, cp.size))
+@@ -612,8 +616,7 @@ static int __init save_microcode_in_init
+       if (dis_ucode_ldr || c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10)
+               return 0;
+ 
+-      find_blobs_in_containers(&cp);
+-      if (!(cp.data && cp.size))
++      if (!find_blobs_in_containers(&cp))
+               return -EINVAL;
+ 
+       scan_containers(cp.data, cp.size, &desc);