]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
RDMA/bnxt_re: Update HW interface headers
authorKalesh AP <kalesh-anakkur.purayil@broadcom.com>
Mon, 2 Sep 2024 05:52:28 +0000 (22:52 -0700)
committerLeon Romanovsky <leon@kernel.org>
Mon, 2 Sep 2024 09:33:47 +0000 (12:33 +0300)
Updating the HW structures for the pcie relax ordering support.
Newly added interface structures will be used in the
followup patch.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://patch.msgid.link/1725256351-12751-2-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/infiniband/hw/bnxt_re/roce_hsi.h

index 0425309695057ec83d7cc1e001b3b71f93180ea5..3ec895284e4931da37a4a9ddf6df4329854ec131 100644 (file)
@@ -409,7 +409,7 @@ struct creq_deinitialize_fw_resp {
        u8      reserved48[6];
 };
 
-/* cmdq_create_qp (size:768b/96B) */
+/* cmdq_create_qp (size:832b/104B) */
 struct cmdq_create_qp {
        u8      opcode;
        #define CMDQ_CREATE_QP_OPCODE_CREATE_QP 0x1UL
@@ -430,8 +430,11 @@ struct cmdq_create_qp {
        #define CMDQ_CREATE_QP_QP_FLAGS_OPTIMIZED_TRANSMIT_ENABLED 0x20UL
        #define CMDQ_CREATE_QP_QP_FLAGS_RESPONDER_UD_CQE_WITH_CFA  0x40UL
        #define CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED          0x80UL
+       #define CMDQ_CREATE_QP_QP_FLAGS_EXPRESS_MODE_ENABLED       0x100UL
+       #define CMDQ_CREATE_QP_QP_FLAGS_STEERING_TAG_VALID         0x200UL
+       #define CMDQ_CREATE_QP_QP_FLAGS_RDMA_READ_OR_ATOMICS_USED  0x400UL
        #define CMDQ_CREATE_QP_QP_FLAGS_LAST                      \
-               CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED
+               CMDQ_CREATE_QP_QP_FLAGS_RDMA_READ_OR_ATOMICS_USED
        u8      type;
        #define CMDQ_CREATE_QP_TYPE_RC            0x2UL
        #define CMDQ_CREATE_QP_TYPE_UD            0x4UL
@@ -492,6 +495,9 @@ struct cmdq_create_qp {
        __le64  rq_pbl;
        __le64  irrq_addr;
        __le64  orrq_addr;
+       __le32  request_xid;
+       __le16  steering_tag;
+       __le16  reserved16;
 };
 
 /* creq_create_qp_resp (size:128b/16B) */
@@ -972,13 +978,14 @@ struct creq_query_qp_extend_resp_sb_tlv {
        __le16  reserved_16;
 };
 
-/* cmdq_create_srq (size:384b/48B) */
+/* cmdq_create_srq (size:448b/56B) */
 struct cmdq_create_srq {
        u8      opcode;
        #define CMDQ_CREATE_SRQ_OPCODE_CREATE_SRQ 0x5UL
        #define CMDQ_CREATE_SRQ_OPCODE_LAST      CMDQ_CREATE_SRQ_OPCODE_CREATE_SRQ
        u8      cmd_size;
        __le16  flags;
+       #define CMDQ_CREATE_SRQ_FLAGS_STEERING_TAG_VALID        0x1UL
        __le16  cookie;
        u8      resp_size;
        u8      reserved8;
@@ -1012,6 +1019,8 @@ struct cmdq_create_srq {
        __le32  dpi;
        __le32  pd_id;
        __le64  pbl;
+       __le16  steering_tag;
+       u8      reserved48[6];
 };
 
 /* creq_create_srq_resp (size:128b/16B) */
@@ -1118,7 +1127,7 @@ struct creq_query_srq_resp_sb {
        __le32  data[4];
 };
 
-/* cmdq_create_cq (size:384b/48B) */
+/* cmdq_create_cq (size:448b/56B) */
 struct cmdq_create_cq {
        u8      opcode;
        #define CMDQ_CREATE_CQ_OPCODE_CREATE_CQ 0x9UL
@@ -1126,6 +1135,8 @@ struct cmdq_create_cq {
        u8      cmd_size;
        __le16  flags;
        #define CMDQ_CREATE_CQ_FLAGS_DISABLE_CQ_OVERFLOW_DETECTION     0x1UL
+       #define CMDQ_CREATE_CQ_FLAGS_STEERING_TAG_VALID                0x2UL
+       #define CMDQ_CREATE_CQ_FLAGS_INFINITE_CQ_MODE                  0x4UL
        __le16  cookie;
        u8      resp_size;
        u8      reserved8;
@@ -1157,6 +1168,8 @@ struct cmdq_create_cq {
        __le32  dpi;
        __le32  cq_size;
        __le64  pbl;
+       __le16  steering_tag;
+       u8      reserved48[6];
 };
 
 /* creq_create_cq_resp (size:128b/16B) */
@@ -1288,11 +1301,12 @@ struct cmdq_allocate_mrw {
        #define CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A  0x3UL
        #define CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B  0x4UL
        #define CMDQ_ALLOCATE_MRW_MRW_FLAGS_LAST      CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B
-       #define CMDQ_ALLOCATE_MRW_UNUSED4_MASK       0xf0UL
-       #define CMDQ_ALLOCATE_MRW_UNUSED4_SFT        4
+       #define CMDQ_ALLOCATE_MRW_STEERING_TAG_VALID     0x10UL
+       #define CMDQ_ALLOCATE_MRW_UNUSED4_MASK       0xe0UL
+       #define CMDQ_ALLOCATE_MRW_UNUSED4_SFT        5
        u8      access;
        #define CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY     0x20UL
-       __le16  unused16;
+       __le16  steering_tag;
        __le32  pd_id;
 };
 
@@ -1359,14 +1373,16 @@ struct creq_deallocate_key_resp {
        __le32  bound_window_info;
 };
 
-/* cmdq_register_mr (size:384b/48B) */
+/* cmdq_register_mr (size:448b/56B) */
 struct cmdq_register_mr {
        u8      opcode;
        #define CMDQ_REGISTER_MR_OPCODE_REGISTER_MR 0xfUL
        #define CMDQ_REGISTER_MR_OPCODE_LAST       CMDQ_REGISTER_MR_OPCODE_REGISTER_MR
        u8      cmd_size;
        __le16  flags;
-       #define CMDQ_REGISTER_MR_FLAGS_ALLOC_MR     0x1UL
+       #define CMDQ_REGISTER_MR_FLAGS_ALLOC_MR                 0x1UL
+       #define CMDQ_REGISTER_MR_FLAGS_STEERING_TAG_VALID       0x2UL
+       #define CMDQ_REGISTER_MR_FLAGS_ENABLE_RO                0x4UL
        __le16  cookie;
        u8      resp_size;
        u8      reserved8;
@@ -1415,6 +1431,8 @@ struct cmdq_register_mr {
        __le64  pbl;
        __le64  va;
        __le64  mr_size;
+       __le16  steering_tag;
+       u8      reserved48[6];
 };
 
 /* creq_register_mr_resp (size:128b/16B) */