drm/msm/dpu: convert vsync source defines to the enum

Add enum dpu_vsync_source instead of a series of defines. Use this enum
to pass vsync information.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/598743/
Link: https://lore.kernel.org/r/20240613-dpu-handle-te-signal-v2-2-67a0116b5366@linaro.org

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index dd9c476ee678575646a647bccdccd962feb1e15c..93d0cd2482e51f0f87a2b92f982927bdca048690 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -747,7 +747,7 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,
                if (disp_info->is_te_using_watchdog_timer)
                        vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_WD_TIMER_0;
                else
-                       vsync_cfg.vsync_source = DPU_VSYNC0_SOURCE_GPIO;
+                       vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_GPIO_0;
 
                hw_mdptop->ops.setup_vsync_source(hw_mdptop, &vsync_cfg);
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index fa6debda0774e6bc3e16819f3094228743690730..29cb854f831a3defd27a768a06d306e0843bde7a 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -477,7 +477,7 @@ static int dpu_hw_intf_get_vsync_info(struct dpu_hw_intf *intf,
 }
 
 static void dpu_hw_intf_vsync_sel(struct dpu_hw_intf *intf,
-               u32 vsync_source)
+                                 enum dpu_vsync_source vsync_source)
 {
        struct dpu_hw_blk_reg_map *c;
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
index ef947bf77693b973b065f861b0ac9418e875c943..fc23650dfbf05d6c739f61c266de608c31f45fc9 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
@@ -108,7 +108,7 @@ struct dpu_hw_intf_ops {
 
        int (*connect_external_te)(struct dpu_hw_intf *intf, bool enable_external_te);
 
-       void (*vsync_sel)(struct dpu_hw_intf *intf, u32 vsync_source);
+       void (*vsync_sel)(struct dpu_hw_intf *intf, enum dpu_vsync_source vsync_source);
 
        /**
         * Disable autorefresh if enabled

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
index 66759623fc4256fb800f2d7ba489518cdcc76743..a2eff36a2224cce3dab7a759fa4b524f1df9c871 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
@@ -54,18 +54,20 @@
 #define DPU_BLEND_BG_INV_MOD_ALPHA     (1 << 12)
 #define DPU_BLEND_BG_TRANSP_EN         (1 << 13)
 
-#define DPU_VSYNC0_SOURCE_GPIO         0
-#define DPU_VSYNC1_SOURCE_GPIO         1
-#define DPU_VSYNC2_SOURCE_GPIO         2
-#define DPU_VSYNC_SOURCE_INTF_0                3
-#define DPU_VSYNC_SOURCE_INTF_1                4
-#define DPU_VSYNC_SOURCE_INTF_2                5
-#define DPU_VSYNC_SOURCE_INTF_3                6
-#define DPU_VSYNC_SOURCE_WD_TIMER_4    11
-#define DPU_VSYNC_SOURCE_WD_TIMER_3    12
-#define DPU_VSYNC_SOURCE_WD_TIMER_2    13
-#define DPU_VSYNC_SOURCE_WD_TIMER_1    14
-#define DPU_VSYNC_SOURCE_WD_TIMER_0    15
+enum dpu_vsync_source {
+       DPU_VSYNC_SOURCE_GPIO_0,
+       DPU_VSYNC_SOURCE_GPIO_1,
+       DPU_VSYNC_SOURCE_GPIO_2,
+       DPU_VSYNC_SOURCE_INTF_0 = 3,
+       DPU_VSYNC_SOURCE_INTF_1,
+       DPU_VSYNC_SOURCE_INTF_2,
+       DPU_VSYNC_SOURCE_INTF_3,
+       DPU_VSYNC_SOURCE_WD_TIMER_4 = 11,
+       DPU_VSYNC_SOURCE_WD_TIMER_3,
+       DPU_VSYNC_SOURCE_WD_TIMER_2,
+       DPU_VSYNC_SOURCE_WD_TIMER_1,
+       DPU_VSYNC_SOURCE_WD_TIMER_0,
+};
 
 enum dpu_hw_blk_type {
        DPU_HW_BLK_TOP = 0,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
index 6f3dc98087dfeae3b997d4822f6c59e4398d05e6..5c9a7ede991edc71738ca0fb60973af09d91e3e6 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
@@ -64,7 +64,7 @@ struct dpu_vsync_source_cfg {
        u32 pp_count;
        u32 frame_rate;
        u32 ppnumber[PINGPONG_MAX];
-       u32 vsync_source;
+       enum dpu_vsync_source vsync_source;
 };
 
 /**