drm/amd/display: Add new IPS config mode

[Why]
We don't have a way to specify IPS2 for display off but RCG only for
static screen and local video playback.

[How]
Add a new setting that allows RCG only when displays are active but
IPS2 when all displays are off.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 12c142cae78bf63e98f2c581b92eafd20451d959..9ae0e602e737ec0137094c21c8029d1320e4db5b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1201,6 +1201,20 @@ bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait)
        return true;
 }
 
+static int count_active_streams(const struct dc *dc)
+{
+       int i, count = 0;
+
+       for (i = 0; i < dc->current_state->stream_count; ++i) {
+               struct dc_stream_state *stream = dc->current_state->streams[i];
+
+               if (stream && !stream->dpms_off)
+                       count += 1;
+       }
+
+       return count;
+}
+
 static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)
 {
        volatile const struct dmub_shared_state_ips_fw *ips_fw;
@@ -1255,6 +1269,21 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)
                        new_signals.bits.allow_pg = 1;
                        new_signals.bits.allow_ips1 = 1;
                        new_signals.bits.allow_ips2 = 1;
+               } else if (dc->config.disable_ips == DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF) {
+                       /* TODO: Move this logic out to hwseq */
+                       if (count_active_streams(dc) == 0) {
+                               /* IPS2 - Display off */
+                               new_signals.bits.allow_pg = 1;
+                               new_signals.bits.allow_ips1 = 1;
+                               new_signals.bits.allow_ips2 = 1;
+                               new_signals.bits.allow_z10 = 1;
+                       } else {
+                               /* RCG only */
+                               new_signals.bits.allow_pg = 0;
+                               new_signals.bits.allow_ips1 = 1;
+                               new_signals.bits.allow_ips2 = 0;
+                               new_signals.bits.allow_z10 = 0;
+                       }
                }
 
                ips_driver->signals = new_signals;

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 34cb25c6166a7f6528b6c6b19ebea0844b8747ed..995a544593353b930489e71d52315c6dc341d322 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -624,6 +624,7 @@ enum dmub_ips_disable_type {
        DMUB_IPS_DISABLE_IPS2 = 3,
        DMUB_IPS_DISABLE_IPS2_Z10 = 4,
        DMUB_IPS_DISABLE_DYNAMIC = 5,
+       DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF = 6,
 };
 
 #define DMUB_IPS1_ALLOW_MASK 0x00000001