drm/amd/display: fix __udivdi3 link error

When compiling the AMDGPU display driver for 32-bit architectures,
the linker reports undefined reference to `__udivdi3` in functions
get_dp_dto_frequency_100hz() and dcn401_get_dp_dto_frequency_100hz().

This is because the code uses 64-bit division (/) on 32-bit systems,
which GCC cannot handle directly and instead tries to call the missing
__udivdi3 helper function.

Replace the raw division with div_u64(), the kernel's standard 64-bit
division helper, to avoid the link error.

Signed-off-by: Linlin Yang <yanglinlin@kylinos.cn>
Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 0421fc6ab3a8514e99156ff3c2cee13ee9af3fa7)
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 7c293917e6fd6f00336b8e403c3b5b10a91bde99..ecb8493ec52339b0575a7e1f374df82aba4944b3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1229,9 +1229,9 @@ static bool get_dp_dto_frequency_100hz(
                         */
                        modulo_hz = REG_READ(MODULO[inst]);
                        if (modulo_hz) {
-                               temp = div_u64((uint64_t)clock_hz * dp_dto_ref_khz * 10, modulo_hz);
-                               ASSERT(temp / 100 <= 0xFFFFFFFFUL);
-                               *pixel_clk_100hz = (unsigned int)(temp / 100);
+                               temp = clock_hz * dp_dto_ref_khz * 10;
+                               ASSERT(temp <= UINT_MAX * modulo_hz * 100ULL);
+                               *pixel_clk_100hz = div_u64(temp, modulo_hz * 100);
                        } else
                                *pixel_clk_100hz = 0;
                } else {
@@ -1285,13 +1285,12 @@ static bool dcn401_get_dp_dto_frequency_100hz(const struct clock_source *clock_s
                 *     - target pix_clk_hz = (DPDTO INTEGER * DPDTO MODULO + DPDTO PHASE)
                 */
                temp = (unsigned long long)dp_dto_integer * modulo_hz + phase_hz;
-
-               if (temp / 100 > 0xFFFFFFFFUL) {
+               if (temp > (UINT_MAX * 100ULL)) {
                        /* pixel rate 100hz should never be this high, if it is, throw an assert and return 0  */
                        BREAK_TO_DEBUGGER();
                        *pixel_clk_100hz = 0;
                } else {
-                       *pixel_clk_100hz = (unsigned int)(temp / 100);
+                       *pixel_clk_100hz = div_u64(temp, 100);
                }
 
                return true;