;; For loads of Q_REG to NONQ_REG we use full sized moves except for partial
;; register stall machines with, where we use QImode instructions, since
;; partial register stall can be caused there. Then we use movzx.
+
(define_insn "*movqi_internal"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q ,q ,r,r ,?r,m ,Yk,Yk,r")
- (match_operand:QI 1 "general_operand" "q ,qn,qm,q,rn,qm,qn,r ,Yk,Yk"))]
+ [(set (match_operand:QI 0 "nonimmediate_operand"
+ "=q,q ,q ,r,r ,?r,m ,Yk,Yk,r")
+ (match_operand:QI 1 "general_operand"
+ "q ,qn,qm,q,rn,qm,qn,r ,Yk,Yk"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
switch (get_attr_type (insn))
(parallel [(set (match_dup 0)
(and:HI (match_dup 0)
(match_dup 1)))
- (clobber (reg:CC FLAGS_REG))])]
- "")
+ (clobber (reg:CC FLAGS_REG))])])
;; Turn *anddi_1 into *andsi_1_zext if possible.
(define_split
(not:SWI12
(xor:SWI12
(match_operand:SWI12 1 "register_operand" "0,Yk")
- (match_operand:SWI12 2 "register_operand" "r,Yk"))))]
+ (match_operand:SWI12 2 "register_operand" "r,Yk"))))
+ (clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F"
"@
#
(not:SWI12
(xor:SWI12
(match_dup 0)
- (match_operand:SWI12 1 "general_reg_operand"))))]
+ (match_operand:SWI12 1 "general_reg_operand"))))
+ (clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F && reload_completed"
[(parallel [(set (match_dup 0)
(xor:HI (match_dup 0)
(match_dup 1)))
(clobber (reg:CC FLAGS_REG))])
(set (match_dup 0)
- (not:HI (match_dup 0)))]
- "")
+ (not:HI (match_dup 0)))])
(define_insn "kortestzhi"
[(set (reg:CCZ FLAGS_REG)