Extends riscv_dwarf_reg_to_regnum to add the ability to convert the
DWARF register numbers for CSRs into GDB's internal numbers.
gdb/ChangeLog:
* riscv-tdep.c (riscv_dwarf_reg_to_regnum): Decode DWARF CSR
numbers.
* riscv-tdep.h (RISCV_DWARF_FIRST_CSR, RISCV_DWARF_LAST_CSR): New
enum values.
+2020-11-11 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * riscv-tdep.c (riscv_dwarf_reg_to_regnum): Decode DWARF CSR
+ numbers.
+ * riscv-tdep.h (RISCV_DWARF_FIRST_CSR, RISCV_DWARF_LAST_CSR): New
+ enum values.
+
2020-11-10 Tom Tromey <tom@tromey.com>
* value.h (internalvar_name): Update.
else if (reg < RISCV_DWARF_REGNUM_F31)
return RISCV_FIRST_FP_REGNUM + (reg - RISCV_DWARF_REGNUM_F0);
+ else if (reg >= RISCV_DWARF_FIRST_CSR && reg <= RISCV_DWARF_LAST_CSR)
+ return RISCV_FIRST_CSR_REGNUM + (reg - RISCV_DWARF_FIRST_CSR);
+
return -1;
}
RISCV_DWARF_REGNUM_X31 = 31,
RISCV_DWARF_REGNUM_F0 = 32,
RISCV_DWARF_REGNUM_F31 = 63,
+ RISCV_DWARF_FIRST_CSR = 4096,
+ RISCV_DWARF_LAST_CSR = 8191,
};
/* RISC-V specific per-architecture information. */