]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: stmmac: s32: move PHY_INTF_SEL_x definitions out of the way
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Mon, 3 Nov 2025 11:50:00 +0000 (11:50 +0000)
committerJakub Kicinski <kuba@kernel.org>
Wed, 5 Nov 2025 00:21:25 +0000 (16:21 -0800)
S32's PHY_INTF_SEL_x definitions conflict with those for the dwmac
cores as they use a different bitmapping. Add a S32 prefix so that
they are unique.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Reviewed-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
Link: https://patch.msgid.link/E1vFt4S-0000000ChoS-2Ahi@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c

index ee095ac132037614583ded9200d14d7cb21b77b2..2b7ad64bfdf7433db47a3e4546d42ec1b9f4733c 100644 (file)
 #define GMAC_INTF_RATE_125M    125000000       /* 125MHz */
 
 /* SoC PHY interface control register */
-#define PHY_INTF_SEL_MII       0x00
-#define PHY_INTF_SEL_SGMII     0x01
-#define PHY_INTF_SEL_RGMII     0x02
-#define PHY_INTF_SEL_RMII      0x08
+#define S32_PHY_INTF_SEL_MII   0x00
+#define S32_PHY_INTF_SEL_SGMII 0x01
+#define S32_PHY_INTF_SEL_RGMII 0x02
+#define S32_PHY_INTF_SEL_RMII  0x08
 
 struct s32_priv_data {
        void __iomem *ioaddr;
@@ -40,7 +40,7 @@ struct s32_priv_data {
 
 static int s32_gmac_write_phy_intf_select(struct s32_priv_data *gmac)
 {
-       writel(PHY_INTF_SEL_RGMII, gmac->ctrl_sts);
+       writel(S32_PHY_INTF_SEL_RGMII, gmac->ctrl_sts);
 
        dev_dbg(gmac->dev, "PHY mode set to %s\n", phy_modes(*gmac->intf_mode));