arm64: dts: apple: t8103: Add spi controller nodes

Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.

Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-2-cd68bfaf0c84@jannau.net
Signed-off-by: Sven Peter <sven@svenpeter.dev>

diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 9b0dad6b618444ac6b1c9735c50cccfc3965f947..c9b789a2ff7e1757930b3fc3682e734c1e4dbef9 100644 (file)
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -326,6 +326,20 @@
                clock-output-names = "clkref";
        };
 
+       clk_120m: clock-120m {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <120000000>;
+               clock-output-names = "clk_120m";
+       };
+
+       clk_200m: clock-200m {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <200000000>;
+               clock-output-names = "clk_200m";
+       };
+
        /*
         * This is a fabulated representation of the input clock
         * to NCO since we don't know the true clock tree.
@@ -441,6 +455,48 @@
                        status = "disabled";
                };
 
+               spi0: spi@235100000 {
+                       compatible = "apple,t8103-spi", "apple,spi";
+                       reg = <0x2 0x35100000 0x0 0x4000>;
+                       interrupt-parent = <&aic>;
+                       interrupts = <AIC_IRQ 614 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_200m>;
+                       pinctrl-0 = <&spi0_pins>;
+                       pinctrl-names = "default";
+                       power-domains = <&ps_spi0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               spi1: spi@235104000 {
+                       compatible = "apple,t8103-spi", "apple,spi";
+                       reg = <0x2 0x35104000 0x0 0x4000>;
+                       interrupt-parent = <&aic>;
+                       interrupts = <AIC_IRQ 615 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_200m>;
+                       pinctrl-0 = <&spi1_pins>;
+                       pinctrl-names = "default";
+                       power-domains = <&ps_spi1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               spi3: spi@23510c000 {
+                       compatible = "apple,t8103-spi", "apple,spi";
+                       reg = <0x2 0x3510c000 0x0 0x4000>;
+                       interrupt-parent = <&aic>;
+                       interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_120m>;
+                       pinctrl-0 = <&spi3_pins>;
+                       pinctrl-names = "default";
+                       power-domains = <&ps_spi3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                serial0: serial@235200000 {
                        compatible = "apple,s5l-uart";
                        reg = <0x2 0x35200000 0x0 0x1000>;
@@ -597,6 +653,26 @@
                                         <APPLE_PINMUX(134, 1)>;
                        };
 
+                       spi0_pins: spi0-pins {
+                               pinmux = <APPLE_PINMUX(67, 1)>, /* CLK */
+                                       <APPLE_PINMUX(68, 1)>,  /* MOSI */
+                                       <APPLE_PINMUX(69, 1)>;  /* MISO */
+                       };
+
+                       spi1_pins: spi1-pins {
+                               pinmux = <APPLE_PINMUX(42, 1)>,
+                                       <APPLE_PINMUX(43, 1)>,
+                                       <APPLE_PINMUX(44, 1)>,
+                                       <APPLE_PINMUX(45, 1)>;
+                       };
+
+                       spi3_pins: spi3-pins {
+                               pinmux = <APPLE_PINMUX(46, 1)>,
+                                       <APPLE_PINMUX(47, 1)>,
+                                       <APPLE_PINMUX(48, 1)>,
+                                       <APPLE_PINMUX(49, 1)>;
+                       };
+
                        pcie_pins: pcie-pins {
                                pinmux = <APPLE_PINMUX(150, 1)>,
                                         <APPLE_PINMUX(151, 1)>,