arm64: dts: renesas: rzg3s-smarc: Enable SSI3

Enable SSI3.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20241210170953.2936724-24-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
index 1a6689e3c8b2a1b046eff2fcb65224ee68d9124c..f87f0c18a083a95a339ef96e80cf00b8ed515a6a 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
@@ -69,6 +69,10 @@
        };
 };
 
+&audio_clk2 {
+       clock-frequency = <12288000>;
+};
+
 &i2c0 {
        status = "okay";
 
@@ -110,6 +114,11 @@
 };
 
 &pinctrl {
+       audio_clock_pins: audio-clock {
+               pins = "AUDIO_CLK1", "AUDIO_CLK2";
+               input-enable;
+       };
+
        key-1-gpio-hog {
                gpio-hog;
                gpios = <RZG2L_GPIO(18, 0) GPIO_ACTIVE_LOW>;
@@ -167,6 +176,13 @@
                        pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
                };
        };
+
+       ssi3_pins: ssi3 {
+               pinmux = <RZG2L_PORT_PINMUX(18, 2, 8)>, /* BCK */
+                        <RZG2L_PORT_PINMUX(18, 3, 8)>, /* RCK */
+                        <RZG2L_PORT_PINMUX(18, 4, 8)>, /* TXD */
+                        <RZG2L_PORT_PINMUX(18, 5, 8)>; /* RXD */
+       };
 };
 
 &scif0 {
@@ -187,3 +203,12 @@
        max-frequency = <125000000>;
        status = "okay";
 };
+
+&ssi3 {
+       clocks = <&cpg CPG_MOD R9A08G045_SSI3_PCLK2>,
+                <&cpg CPG_MOD R9A08G045_SSI3_PCLK_SFR>,
+                <&versa3 2>, <&audio_clk2>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&ssi3_pins>, <&audio_clock_pins>;
+       status = "okay";
+};