}
if { $test_what == "-fauto-profile" } {
- if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
+ if { !([check_effective_target_x86] && [istarget *-*-linux*]) } {
verbose "autofdo only supported on linux"
return 0
}
return [add_options_for_riscv_z_ext zvbb $flags]
}
+# Return 1 if the target is ia32 or x86_64.
+
+proc check_effective_target_x86 { } {
+ if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+ return 1
+ } else {
+ return 0
+ }
+}
+
# Return 1 if the target OS supports running SSE executables, 0
# otherwise. Cache the result.
proc check_sse_os_support_available { } {
return [check_cached_effective_target sse_os_support_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
- expr 0
- } else {
- expr 1
- }
+ expr [check_effective_target_x86]
}]
}
proc check_avx_os_support_available { } {
return [check_cached_effective_target avx_os_support_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
# Check that OS has AVX and SSE saving enabled.
proc check_avx512_os_support_available { } {
return [check_cached_effective_target avx512_os_support_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
# Check that OS has AVX512, AVX and SSE saving enabled.
proc check_sse_hw_available { } {
return [check_cached_effective_target sse_hw_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
check_runtime_nocache sse_hw_available {
proc check_sse2_hw_available { } {
return [check_cached_effective_target sse2_hw_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
check_runtime_nocache sse2_hw_available {
proc check_sse4_hw_available { } {
return [check_cached_effective_target sse4_hw_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
check_runtime_nocache sse4_hw_available {
proc check_avx_hw_available { } {
return [check_cached_effective_target avx_hw_available {
# If this is not the right target then we can skip the test.
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
check_runtime_nocache avx_hw_available {
proc check_avx2_hw_available { } {
return [check_cached_effective_target avx2_hw_available {
# If this is not the right target then we can skip the test.
- if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
check_runtime_nocache avx2_hw_available {
proc check_avx512f_hw_available { } {
return [check_cached_effective_target avx512f_hw_available {
# If this is not the right target then we can skip the test.
- if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+ if { ![check_effective_target_x86] } {
expr 0
} else {
check_runtime_nocache avx512f_hw_available {
# Return 1 if bmi2 instructions can be compiled.
proc check_effective_target_bmi2 { } {
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
- return 0
+ if { ![check_effective_target_x86] } {
+ return 0
}
return [check_no_compiler_messages bmi2 object {
unsigned int
if { [istarget arm*-*-*] } {
return "$flags -mfp16-format=ieee"
}
- if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+ if { [check_effective_target_x86] } {
return "$flags -msse2 -mfpmath=sse"
}
return "$flags"
return [check_ppc_float128_sw_available]
}
if { [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+ || [check_effective_target_x86] } {
return 1
}
return 0
}
proc add_options_for_bfloat16 { flags } {
- if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+ if { [check_effective_target_x86] } {
return "$flags -msse2"
}
return "$flags"
proc check_effective_target_dfp_bid { } {
if { [istarget aarch64*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]} {
+ || [check_effective_target_x86]} {
return 1
}
return 0
return [check_cached_effective_target vect_cmdline_needed {
if { [istarget alpha*-*-*]
|| [istarget ia64-*-*]
- || (([istarget i?86-*-*] || [istarget x86_64-*-*])
+ || ([check_effective_target_x86]
&& ![is-effective-target ia32])
|| ([istarget powerpc*-*-*]
&& [check_effective_target_powerpc_altivec])
proc check_effective_target_vect_int { } {
return [check_cached_effective_target_indexed vect_int {
expr {
- [istarget i?86-*-*] || [istarget x86_64-*-*]
+ [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [istarget amdgcn-*-*]
|| [istarget sparc*-*-*]
proc check_effective_target_vect_intfloat_cvt { } {
return [check_cached_effective_target_indexed vect_intfloat_cvt {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
proc check_effective_target_vect_doubleint_cvt { } {
return [check_cached_effective_target_indexed vect_doubleint_cvt {
- expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
- && [check_no_compiler_messages vect_doubleint_cvt assembly {
+ expr { ([check_effective_target_x86]
+ && [check_no_compiler_messages vect_doubleint_cvt assembly {
#ifdef __tune_atom__
# error No double vectorizer support.
#endif
}])
- || [istarget aarch64*-*-*]
- || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
- || ([istarget mips*-*-*]
+ || [istarget aarch64*-*-*]
+ || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
+ || ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx])
proc check_effective_target_vect_intdouble_cvt { } {
return [check_cached_effective_target_indexed vect_intdouble_cvt {
- expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
+ expr { ([check_effective_target_x86]
&& [check_no_compiler_messages vect_intdouble_cvt assembly {
#ifdef __tune_atom__
# error No double vectorizer support.
proc check_effective_target_vect_uintfloat_cvt { } {
return [check_cached_effective_target_indexed vect_uintfloat_cvt {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [istarget aarch64*-*-*]
|| [is-effective-target arm_neon]
proc check_effective_target_vect_floatint_cvt { } {
return [check_cached_effective_target_indexed vect_floatint_cvt {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
# specified arch will be chosen, but still we need to at least
# be able to assemble avx512f.
return [check_cached_effective_target_indexed vect_simd_clones {
- expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
+ expr { ([check_effective_target_x86]
&& [check_effective_target_avx512f])
|| [istarget amdgcn-*-*]
|| [istarget aarch64*-*-*] }}]
return [check_cached_effective_target_indexed vect_shift {
expr {[istarget powerpc*-*-*]
|| [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget aarch64*-*-*]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
proc check_effective_target_vect_var_shift { } {
return [check_cached_effective_target_indexed vect_var_shift {
- expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
+ expr {([check_effective_target_x86]
&& [check_avx2_available])
|| [istarget aarch64*-*-*]
|| ([istarget riscv*-*-*]
}
proc check_effective_target_whole_vector_shift { } {
- if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ if { [check_effective_target_x86]
|| [istarget ia64-*-*]
|| [istarget aarch64*-*-*]
|| [istarget powerpc64*-*-*]
proc check_effective_target_vect_bool_cmp { } {
return [check_cached_effective_target_indexed vect_bool_cmp {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget aarch64*-*-*]
|| [is-effective-target arm_neon]
|| ([istarget riscv*-*-*]
proc check_effective_target_vect_char_add { } {
return [check_cached_effective_target_indexed vect_char_add {
expr {
- [istarget i?86-*-*] || [istarget x86_64-*-*]
+ [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [istarget amdgcn-*-*]
|| [istarget ia64-*-*]
# This can change for different subtargets so do not cache the result.
proc check_effective_target_vect_long { } {
- if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ if { [check_effective_target_x86]
|| ([istarget powerpc*-*-*]
&& [check_effective_target_ilp32])
|| [is-effective-target arm_neon]
proc check_effective_target_vect_float { } {
return [check_cached_effective_target_indexed vect_float {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [istarget mips-sde-elf]
|| [istarget mipsisa64*-*-*]
proc check_effective_target_vect_double { } {
return [check_cached_effective_target_indexed vect_double {
- expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
- && [check_no_compiler_messages vect_double assembly {
+ expr { ([check_effective_target_x86]
+ && [check_no_compiler_messages vect_double assembly {
#ifdef __tune_atom__
# error No double vectorizer support.
#endif
proc check_effective_target_vect_long_long { } {
return [check_cached_effective_target_indexed vect_long_long {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
expr { [is-effective-target arm_neon]
|| [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mpaired_single]
|| [et-is-effective-target mips_msa]))
|| ([istarget aarch64*-*-*]
&& [is-effective-target aarch64_little_endian])
|| [istarget powerpc*-*-*]
- || (([istarget i?86-*-*] || [istarget x86_64-*-*])
+ || ([check_effective_target_x86]
&& [check_ssse3_available])
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
proc check_effective_target_xorsign { } {
return [check_cached_effective_target_indexed xorsign {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
}
proc check_effective_target_ifn_copysign { } {
return [check_cached_effective_target_indexed ifn_copysign {
expr {
- (([istarget i?86-*-*] || [istarget x86_64-*-*])
- && [is-effective-target sse])
+ ([check_effective_target_x86]
+ && [is-effective-target sse])
|| ([istarget loongarch*-*-*]
&& [check_effective_target_hard_float])
|| [istarget powerpc*-*-*]
|| [istarget ia64-*-*]
|| ([istarget aarch64*-*-*]
&& ![check_effective_target_aarch64_sve])
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [is-effective-target arm_neon]
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx]))
expr { [istarget powerpc*-*-*]
|| [istarget ia64-*-*]
|| [istarget loongarch*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian])
|| ([istarget s390*-*-*]
proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
expr { [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget loongarch*-*-*]
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx]) }}]
return [check_cached_effective_target_indexed vect_sdot_hi {
expr { [istarget powerpc*-*-*]
|| [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget riscv*-*-*]
proc check_effective_target_vect_usad_char { } {
return [check_cached_effective_target_indexed vect_usad_char {
- expr { [istarget i?86-*-*]
- || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| ([istarget aarch64*-*-*]
&& ![check_effective_target_aarch64_sve])
|| ([istarget powerpc*-*-*]
proc check_effective_target_vect_pack_trunc { } {
return [check_cached_effective_target_indexed vect_pack_trunc {
expr { [istarget powerpc*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
&& [check_effective_target_arm_little_endian])
proc check_effective_target_vect_unpack { } {
return [check_cached_effective_target_indexed vect_unpack {
expr { [istarget powerpc*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget ia64-*-*]
|| [istarget aarch64*-*-*]
|| ([istarget mips*-*-*]
proc check_effective_target_vect_hw_misalign { } {
return [check_cached_effective_target_indexed vect_hw_misalign {
- if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ if { [check_effective_target_x86]
|| ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
|| [istarget aarch64*-*-*]
|| ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
proc check_effective_target_vect_aligned_arrays { } {
set et_vect_aligned_arrays 0
- if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
+ if { ([check_effective_target_x86]
&& !([is-effective-target ia32]
|| ([check_avx_available] && ![check_prefer_avx128]))) } {
set et_vect_aligned_arrays 1
expr { [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget arm*-*-*]
proc check_effective_target_vect_cond_mixed { } {
return [check_cached_effective_target_indexed vect_cond_mixed {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| ([istarget arm*-*-*]
return [check_cached_effective_target_indexed vect_char_mult {
expr { [istarget aarch64*-*-*]
|| [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [check_effective_target_arm32]
|| [check_effective_target_powerpc_altivec]
|| ([istarget mips*-*-*]
proc check_effective_target_vect_short_mult { } {
return [check_cached_effective_target_indexed vect_short_mult {
expr { [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
proc check_effective_target_vect_int_mult { } {
return [check_cached_effective_target_indexed vect_int_mult {
expr { [istarget powerpc*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget ia64-*-*]
|| [istarget aarch64*-*-*]
|| ([istarget mips*-*-*]
# This can change for different subtargets so do not cache the result.
proc check_effective_target_vect_long_mult { } {
- if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ if { [check_effective_target_x86]
|| ([istarget powerpc*-*-*]
&& ([check_effective_target_ilp32]
|| ([check_effective_target_powerpc_vsx_ok]
expr { [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| [is-effective-target arm_neon]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget ia64-*-*]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mips_msa]
expr { [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| [is-effective-target arm_neon]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget ia64-*-*]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mpaired_single]
} elseif { [istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok] } {
lappend result 128 64
- } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+ } elseif { [check_effective_target_x86] } {
if { [check_avx_available] && ![check_prefer_avx128] } {
lappend result 256
}
proc check_effective_target_vect_call_copysignf { } {
return [check_cached_effective_target_indexed vect_call_copysignf {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [istarget powerpc*-*-*]
|| [istarget aarch64*-*-*]
|| [istarget amdgcn-*-*]
proc check_effective_target_sqrt_insn { } {
return [check_cached_effective_target sqrt_insn {
- expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ expr { [check_effective_target_x86]
|| [check_effective_target_powerpc_sqrt]
|| [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
proc check_effective_target_vect_call_sqrtf { } {
return [check_cached_effective_target_indexed vect_call_sqrtf {
expr { [istarget aarch64*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| ([istarget powerpc*-*-*] && [check_vsx_hw_available])
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx])
proc check_effective_target_vect_call_lrint { } {
set et_vect_call_lrint 0
- if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
+ if { ([check_effective_target_x86]
&& [check_effective_target_ilp32])
|| [istarget amdgcn-*-*]
|| [istarget loongarch*-*-*] } {
|| [istarget amdgcn-*-*]
|| [check_effective_target_riscv_v]
|| [check_effective_target_loongarch_sx]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]}]
+ || [check_effective_target_x86]}]
}
# Return 1 if the target supports the fold_extract_last optab.
# Note: 32bit s390 targets require -mzarch in dg-options.
proc check_effective_target_sync_long_long { } {
- if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ if { [check_effective_target_x86]
|| [istarget aarch64*-*-*]
|| [istarget arm*-*-*]
|| [istarget alpha*-*-*]
# Note: 32bit x86 targets require -march=pentium in dg-options.
proc check_effective_target_sync_long_long_runtime { } {
- if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
+ if { ([check_effective_target_x86]
&& [check_cached_effective_target sync_long_long_available {
check_runtime_nocache sync_long_long_available {
#include "cpuid.h"
return [check_cached_effective_target bswap {
expr { [istarget aarch64*-*-*]
|| [istarget alpha*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget m68k-*-*]
|| [istarget powerpc*-*-*]
|| [istarget rs6000-*-*]
# load-reserved/store-conditional instructions.
return [check_cached_effective_target sync_int_long {
expr { [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget aarch64*-*-*]
|| [istarget alpha*-*-*]
|| [istarget arm*-*-linux-*]
return [check_cached_effective_target sync_char_short {
expr { [istarget aarch64*-*-*]
|| [istarget ia64-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget alpha*-*-*]
|| [istarget arm*-*-linux-*]
|| [istarget arm*-*-uclinuxfdpiceabi]
proc check_effective_target_automatic_stack_alignment { } {
# Ordinarily x86 supports automatic stack alignment ...
- if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
+ if { [check_effective_target_x86] } then {
if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
# ... except Win64 SEH doesn't. Succeed for Win32 though.
return [check_effective_target_ilp32];
# Return 1 if avx instructions can be compiled.
proc check_effective_target_avx { } {
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
return 0
}
return [check_no_compiler_messages avx object {
# Return 1 if -Wa,-march=+noavx512bw is supported.
proc check_effective_target_assembler_march_noavx512bw {} {
- if { [istarget i?86*-*-*] || [istarget x86_64*-*-*] } {
+ if { [check_effective_target_x86] } {
return [check_no_compiler_messages assembler_march_noavx512bw object {
void foo (void) {}
} "-mno-avx512bw -Wa,-march=+noavx512bw"]
}
set dg-do-what-default compile
}
- } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+ } elseif { [check_effective_target_x86] } {
lappend DEFAULT_VECTCFLAGS "-msse2"
if { [check_effective_target_sse2_runtime] } {
set dg-do-what-default run
|| [istarget csky*-*-*]
|| [istarget epiphany*-*-*]
|| [istarget frv*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget loongarch*-*-*]
|| [istarget mips*-*-*]
|| [istarget s390*-*-*]
global tool
global GCC_UNDER_TEST
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
return 0
}
global tool
global GCC_UNDER_TEST
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
return 0
}
global tool
global GCC_UNDER_TEST
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
return 0
}
global tool
global GCC_UNDER_TEST
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
return 0
}
#TODO: Add checks for all targets that have either hardware divmod insn
# or define libfunc for divmod.
if { [istarget arm*-*-*]
- || [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [check_effective_target_x86]
|| [istarget amdgcn-*-*] } {
return 1
}
#
proc check_effective_target_supports_stack_clash_protection { } {
- if { [istarget x86_64-*-*] || [istarget i?86-*-*]
+ if { [check_effective_target_x86]
|| [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
|| [istarget aarch64*-**] || [istarget s390*-*-*]
|| [istarget loongarch64*-**] || [istarget riscv64*-**] } {
# Note we ignore cases where we apply tail call optimization here.
proc check_effective_target_frame_pointer_for_non_leaf { } {
# Solaris/x86 defaults to -fno-omit-frame-pointer.
- if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
+ if { [check_effective_target_x86] && [istarget *-*-solaris*] } {
return 1
}
# On x86/x86_64 the call instruction itself pushes the return
# address onto the stack. That is an implicit probe of *sp.
- if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
+ if { [check_effective_target_x86] } {
return 1
}
# stack allocations and make it difficult to elimination loops or residual
# allocations for dynamic stack allocations
proc check_effective_target_callee_realigns_stack { } {
- if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
+ if { [check_effective_target_x86] } {
return 1
}
return 0
# Return 1 if CET instructions can be compiled.
proc check_effective_target_cet { } {
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+ if { ![check_effective_target_x86] } {
return 0
}
return [check_no_compiler_messages cet object {
# Return 1 if the compiler supports '-mfentry'.
proc check_effective_target_mfentry { } {
- if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
- return 0
+ if { ![check_effective_target_x86] } {
+ return 0
}
return [check_no_compiler_messages mfentry object {
void foo (void) { }
proc check_effective_target_lra { } {
# Start with heavily used targets which are known to always use LRA.
- if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+ if { [check_effective_target_x86]
|| [istarget aarch64*-*-*] || [istarget arm*-*-*]
|| [istarget powerpc*-*-*] || [istarget riscv*-*-*] } {
return 1
# Return 1 if the target supports heap-trampoline, 0 otherwise.
proc check_effective_target_heap_trampoline {} {
if { [istarget aarch64*-*-linux*]
- || [istarget i?86-*-darwin*]
- || [istarget x86_64-*-darwin*]
- || [istarget i?86-*-linux*]
- || [istarget x86_64-*-linux*] } {
+ || ([check_effective_target_x86]
+ && ([istarget *-*-darwin*]
+ || [istarget *-*-linux*])) } {
return 1
}
return 0