powerpc: fix tst-ucontext-ppc64-vscr test for POWER 5/6.

An error "impossible register constraint in 'asm'" was raised on POWER
5 and due to __vector __int128_t being used as operands without passing the
option -msvx to gcc.
This patch replaces "__vector __int128_t" with "__vector unsigned int"
which requires only -maltivec, available since POWER ISA 2.03, and which
is already passed to the compiler.

	* sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c:
	(do_test): Changed __vector __int128_t to __vector unsigned int.

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>

diff --git a/ChangeLog b/ChangeLog
index 3a94b71fe72fad92627835ec26d4f8fe71c3b146..36ce7b34e3cc78c8ab4bfa4062379263e5a02882 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2019-01-15  Rogerio A. Cardoso  <rcardoso@linux.ibm.com>
+
+       * sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c:
+       (do_test): Changed __vector __int128_t to __vector unsigned int.
+
 2019-01-14  Leonardo Sandoval  <leonardo.sandoval.gonzalez@intel.com>
 
        * sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add

diff --git a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
index 2dcf5bb634784cde207b03f9f1518b47679f3ae7..dbe06c847b1ca62b9a19aa07462f356d2af61314 100644 (file)
--- a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
+++ b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
@@ -44,8 +44,8 @@ do_test (void)
   uint32_t* vscr_ptr = vscr;
   uint32_t vscr_word;
   ucontext_t ucp;
-  __vector __int128_t v0 = {0};
-  __vector __int128_t v1 = {0};
+  __vector unsigned int v0 = {0};
+  __vector unsigned int v1 = {0};
 
   /* Set SAT bit in VSCR register.  */
   asm volatile (".machine push;\n"