We can only allow TARGET_MIN_VLEN * 8 (LMUL) < 65535. */
if (TARGET_MIN_VLEN_OPTS (opts) > 4096)
- sorry ("Current RISC-V GCC cannot support VLEN greater than 4096bit for "
+ sorry ("Current RISC-V GCC does not support VLEN greater than 4096bit for "
"'V' Extension");
/* FIXME: We don't support RVV in big-endian for now, we may enable RVV with
big-endian after finishing full coverage testing. */
if (TARGET_VECTOR && TARGET_BIG_ENDIAN)
- sorry ("Current RISC-V GCC cannot support RVV in big-endian mode");
+ sorry ("Current RISC-V GCC does not support RVV in big-endian mode");
/* Convert -march to a chunks count. */
riscv_vector_chunks = riscv_convert_vector_bits (opts);