--- /dev/null
+From c9fe573a6584034670c1a55ee8162d623519cbbf Mon Sep 17 00:00:00 2001
+From: "Hebbar, Gururaja" <gururaja.hebbar@ti.com>
+Date: Tue, 26 Jun 2012 19:25:11 +0530
+Subject: ASoC: tlv320aic3x: Fix codec pll configure bug
+
+From: "Hebbar, Gururaja" <gururaja.hebbar@ti.com>
+
+commit c9fe573a6584034670c1a55ee8162d623519cbbf upstream.
+
+In sound/soc/codecs/tlv320aic3x.c
+
+ data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
+ snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
+ data | (pll_p << PLLP_SHIFT));
+
+In the above code, pll-p value is OR'ed with previous value without
+clearing it. Bug is not seen if pll-p value doesn't change across
+Sampling frequency.
+
+However on some platforms (like AM335x EVM-SK), pll-p may have different
+values across different sampling frequencies. In such case, above code
+configures the pll with a wrong value.
+Because of this bug, when a audio stream is played with pll value
+different from previous stream, audio is heard as differently(like its
+stretched).
+
+Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
+Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ sound/soc/codecs/tlv320aic3x.c | 4 +---
+ sound/soc/codecs/tlv320aic3x.h | 1 +
+ 2 files changed, 2 insertions(+), 3 deletions(-)
+
+--- a/sound/soc/codecs/tlv320aic3x.c
++++ b/sound/soc/codecs/tlv320aic3x.c
+@@ -949,9 +949,7 @@ static int aic3x_hw_params(struct snd_pc
+ }
+
+ found:
+- data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
+- snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
+- data | (pll_p << PLLP_SHIFT));
++ snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLLP_MASK, pll_p);
+ snd_soc_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG,
+ pll_r << PLLR_SHIFT);
+ snd_soc_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT);
+--- a/sound/soc/codecs/tlv320aic3x.h
++++ b/sound/soc/codecs/tlv320aic3x.h
+@@ -166,6 +166,7 @@
+
+ /* PLL registers bitfields */
+ #define PLLP_SHIFT 0
++#define PLLP_MASK 7
+ #define PLLQ_SHIFT 3
+ #define PLLR_SHIFT 0
+ #define PLLJ_SHIFT 2
--- /dev/null
+From 7508b657967cf664b5aa0f6367d05016e7e3bc2a Mon Sep 17 00:00:00 2001
+From: Panayiotis Karabassis <panayk@gmail.com>
+Date: Tue, 26 Jun 2012 23:37:17 +0300
+Subject: ath9k: enable serialize_regmode for non-PCIE AR9287
+
+From: Panayiotis Karabassis <panayk@gmail.com>
+
+commit 7508b657967cf664b5aa0f6367d05016e7e3bc2a upstream.
+
+https://bugzilla.kernel.org/show_bug.cgi?id=42903
+
+Based on the work of <fynivx@gmail.com>
+
+Signed-off-by: Panayiotis Karabassis <panayk@gmail.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/hw.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -530,7 +530,7 @@ static int __ath9k_hw_init(struct ath_hw
+
+ if (ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
+ if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI ||
+- ((AR_SREV_9160(ah) || AR_SREV_9280(ah)) &&
++ ((AR_SREV_9160(ah) || AR_SREV_9280(ah) || AR_SREV_9287(ah)) &&
+ !ah->is_pciexpress)) {
+ ah->config.serialize_regmode =
+ SER_REG_MODE_ON;
--- /dev/null
+From bcb7ad7bcbef030e6ba71ede1f9866368aca7c99 Mon Sep 17 00:00:00 2001
+From: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+Date: Wed, 13 Jun 2012 21:28:09 +0530
+Subject: ath9k: Fix softlockup in AR9485
+
+From: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+
+commit bcb7ad7bcbef030e6ba71ede1f9866368aca7c99 upstream.
+
+steps to recreate:
+load latest ath9k driver with AR9485
+stop the network-manager and wpa_supplicant
+bring the interface up
+
+ Call Trace:
+ [<ffffffffa0517490>] ? ath_hw_check+0xe0/0xe0 [ath9k]
+ [<ffffffff812cd1e8>] __const_udelay+0x28/0x30
+ [<ffffffffa03bae7a>] ar9003_get_pll_sqsum_dvc+0x4a/0x80 [ath9k_hw]
+ [<ffffffffa05174eb>] ath_hw_pll_work+0x5b/0xe0 [ath9k]
+ [<ffffffff810744fe>] process_one_work+0x11e/0x470
+ [<ffffffff8107530f>] worker_thread+0x15f/0x360
+ [<ffffffff810751b0>] ? manage_workers+0x230/0x230
+ [<ffffffff81079af3>] kthread+0x93/0xa0
+ [<ffffffff815fd3a4>] kernel_thread_helper+0x4/0x10
+ [<ffffffff81079a60>] ? kthread_freezable_should_stop+0x70/0x70
+ [<ffffffff815fd3a0>] ? gs_change+0x13/0x13
+
+ensure that the PLL-WAR for AR9485/AR9340 is executed only if the STA is
+associated (or) IBSS/AP mode had started beaconing. Ideally this WAR
+is needed to recover from some rare beacon stuck during stress testing.
+Before the STA is associated/IBSS had started beaconing, PLL4(0x1618c)
+always seem to have zero even though we had configured PLL3(0x16188) to
+query about PLL's locking status. When we keep on polling infinitely PLL4's
+8th bit(ie check for PLL locking measurements is done), machine hangs
+due to softlockup.
+
+fixes https://bugzilla.redhat.com/show_bug.cgi?id=811142
+
+Reported-by: Rolf Offermanns <rolf.offermanns@gmx.net>
+Tested-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/main.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -648,6 +648,15 @@ void ath_hw_pll_work(struct work_struct
+ hw_pll_work.work);
+ u32 pll_sqsum;
+
++ /*
++ * ensure that the PLL WAR is executed only
++ * after the STA is associated (or) if the
++ * beaconing had started in interfaces that
++ * uses beacons.
++ */
++ if (!(sc->sc_flags & SC_OP_BEACONS))
++ return;
++
+ if (AR_SREV_9485(sc->sc_ah)) {
+
+ ath9k_ps_wakeup(sc);
--- /dev/null
+From 931cb03afed7b541392295f3afc4638da32f08a0 Mon Sep 17 00:00:00 2001
+From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Date: Wed, 20 Jun 2012 16:29:20 +0530
+Subject: ath9k_htc: configure bssid on ASSOC/IBSS change
+
+From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+
+commit 931cb03afed7b541392295f3afc4638da32f08a0 upstream.
+
+After the change "mac80211: remove spurious BSSID change flag",
+BSS_CHANGED_BSSID will not be passed on association or IBSS
+status changes. So it could be better to program bssid on ASSOC
+or IBSS change notification. Not doing so, is affecting the
+packet transmission.
+
+Reported-by: Michael Leun <lkml20120218@newton.leun.net>
+Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/htc_drv_main.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
++++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+@@ -1487,6 +1487,7 @@ static void ath9k_htc_bss_info_changed(s
+ priv->num_sta_assoc_vif++ : priv->num_sta_assoc_vif--;
+
+ if (priv->ah->opmode == NL80211_IFTYPE_STATION) {
++ ath9k_htc_choose_set_bssid(priv);
+ if (bss_conf->assoc && (priv->num_sta_assoc_vif == 1))
+ ath9k_htc_start_ani(priv);
+ else if (priv->num_sta_assoc_vif == 0)
+@@ -1494,13 +1495,11 @@ static void ath9k_htc_bss_info_changed(s
+ }
+ }
+
+- if (changed & BSS_CHANGED_BSSID) {
++ if (changed & BSS_CHANGED_IBSS) {
+ if (priv->ah->opmode == NL80211_IFTYPE_ADHOC) {
+ common->curaid = bss_conf->aid;
+ memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
+ ath9k_htc_set_bssid(priv);
+- } else if (priv->ah->opmode == NL80211_IFTYPE_STATION) {
+- ath9k_htc_choose_set_bssid(priv);
+ }
+ }
+
--- /dev/null
+From f18e3c6b67f448ec47b3a5b242789bd3d5644879 Mon Sep 17 00:00:00 2001
+From: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+Date: Mon, 18 Jun 2012 13:13:30 +0530
+Subject: ath9k_hw: avoid possible infinite loop in
+ ar9003_get_pll_sqsum_dvc
+
+From: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+
+commit f18e3c6b67f448ec47b3a5b242789bd3d5644879 upstream.
+
+"ath9k: Fix softlockup in AR9485" with commit id
+64bc1239c790e051ff677e023435d770d2ffa174 fixed the reported
+issue, yet its better to avoid the possible infinite loop
+in ar9003_get_pll_sqsum_dvc by having a timeout as suggested
+by ath9k maintainers.
+http://www.spinics.net/lists/linux-wireless/msg92126.html.
+Based on my testing PLL's locking measurement is done in
+~200us (2 iterations).
+
+Cc: Rolf Offermanns <rolf.offermanns@gmx.net>
+Cc: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
+Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/hw.c | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -682,13 +682,25 @@ static void ath9k_hw_init_qos(struct ath
+
+ u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
+ {
++ struct ath_common *common = ath9k_hw_common(ah);
++ int i = 0;
++
+ REG_CLR_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
+ udelay(100);
+ REG_SET_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
+
+- while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0)
++ while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) {
++
+ udelay(100);
+
++ if (WARN_ON_ONCE(i >= 100)) {
++ ath_err(common, "PLL4 meaurement not done\n");
++ break;
++ }
++
++ i++;
++ }
++
+ return (REG_READ(ah, PLL3) & SQSUM_DVC_MASK) >> 3;
+ }
+ EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);
udf-use-ret-instead-of-abusing-i-in-udf_load_logicalvol.patch
udf-avoid-run-away-loop-when-partition-table-length-is-corrupted.patch
udf-fortify-loading-of-sparing-table.patch
+ath9k-fix-softlockup-in-ar9485.patch
+ath9k_hw-avoid-possible-infinite-loop-in.patch
+ath9k_htc-configure-bssid-on-assoc-ibss-change.patch
+ath9k-enable-serialize_regmode-for-non-pcie-ar9287.patch
+asoc-tlv320aic3x-fix-codec-pll-configure-bug.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
