net: stmmac: dwmac-loongson: Add Loongson GNET support

The new generation Loongson LS2K2000 SoC and LS7A2000 chipset are
equipped with the network controllers called Loongson GNET. It's the
single and multi DMA-channels Loongson GMAC but with a PHY attached.
Here is the summary of the DW GMAC features the controller has:

   DW GMAC IP-core: v3.73a
   Speeds: 10/100/1000Mbps
   Duplex: Full (both versions), Half (LS2K2000 GNET only)
   DMA-descriptors type: enhanced
   L3/L4 filters availability: Y
   VLAN hash table filter: Y
   PHY-interface: GMII (PHY is integrated into the chips)
   Remote Wake-up support: Y
   Mac Management Counters (MMC): Y
   Number of additional MAC addresses: 5
   MAC Hash-based filter: Y
   Hash Table Size: 256
   AV feature: Y (LS2K2000 GNET only)
   DMA channels: 8 (LS2K2000 GNET), 1 (LS7A2000 GNET)

Let's update the Loongson DWMAC driver to supporting the new Loongson
GNET controller. The change is mainly trivial: the driver shall be
bound to the PCIe device with DID 0x7a13, and the device-specific
setup() method shall be called for it. The only peculiarity concerns
the integrated PHY speed change procedure. The PHY has a weird problem
with switching from the low speeds to 1000Mbps mode. The speedup
procedure requires the PHY-link re-negotiation. So the suggested
change provide the device-specific fix_mac_speed() method to overcome
the problem.

Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: Yinggang Gu <guyinggang@loongson.cn>
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
index 48c92ba826d9e33ee68937802bd2f5544be26117..949e349ef8568dc052b88ba5fec539962671e4ce 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
@@ -65,11 +65,13 @@
                                         DMA_STATUS_MSK_COMMON_LOONGSON)
 
 #define PCI_DEVICE_ID_LOONGSON_GMAC    0x7a03
+#define PCI_DEVICE_ID_LOONGSON_GNET    0x7a13
 #define DWMAC_CORE_LS_MULTICHAN        0x10    /* Loongson custom ID */
 #define CHANNEL_NUM                    8
 
 struct loongson_data {
        u32 loongson_id;
+       struct device *dev;
 };
 
 struct stmmac_pci_info {
@@ -147,6 +149,60 @@ static struct stmmac_pci_info loongson_gmac_pci_info = {
        .setup = loongson_gmac_data,
 };
 
+static void loongson_gnet_fix_speed(void *priv, unsigned int speed,
+                                   unsigned int mode)
+{
+       struct loongson_data *ld = (struct loongson_data *)priv;
+       struct net_device *ndev = dev_get_drvdata(ld->dev);
+       struct stmmac_priv *ptr = netdev_priv(ndev);
+
+       /* The integrated PHY has a weird problem with switching from the low
+        * speeds to 1000Mbps mode. The speedup procedure requires the PHY-link
+        * re-negotiation.
+        */
+       if (speed == SPEED_1000) {
+               if (readl(ptr->ioaddr + MAC_CTRL_REG) &
+                   GMAC_CONTROL_PS)
+                       /* Word around hardware bug, restart autoneg */
+                       phy_restart_aneg(ndev->phydev);
+       }
+}
+
+static int loongson_gnet_data(struct pci_dev *pdev,
+                             struct plat_stmmacenet_data *plat)
+{
+       struct loongson_data *ld;
+       int i;
+
+       ld = plat->bsp_priv;
+
+       loongson_default_data(pdev, plat);
+
+       if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) {
+               plat->rx_queues_to_use = CHANNEL_NUM;
+               plat->tx_queues_to_use = CHANNEL_NUM;
+
+               /* Only channel 0 supports checksum,
+                * so turn off checksum to enable multiple channels.
+                */
+               for (i = 1; i < CHANNEL_NUM; i++)
+                       plat->tx_queues_cfg[i].coe_unsupported = 1;
+       } else {
+               plat->tx_queues_to_use = 1;
+               plat->rx_queues_to_use = 1;
+       }
+
+       plat->phy_interface = PHY_INTERFACE_MODE_GMII;
+       plat->mdio_bus_data->phy_mask = ~(u32)BIT(2);
+       plat->fix_mac_speed = loongson_gnet_fix_speed;
+
+       return 0;
+}
+
+static struct stmmac_pci_info loongson_gnet_pci_info = {
+       .setup = loongson_gnet_data,
+};
+
 static void loongson_dwmac_dma_init_channel(struct stmmac_priv *priv,
                                            void __iomem *ioaddr,
                                            struct stmmac_dma_cfg *dma_cfg,
@@ -279,8 +335,10 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)
        struct mac_device_info *mac;
        struct stmmac_dma_ops *dma;
        struct loongson_data *ld;
+       struct pci_dev *pdev;
 
        ld = priv->plat->bsp_priv;
+       pdev = to_pci_dev(priv->device);
 
        mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL);
        if (!mac)
@@ -290,7 +348,7 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)
        if (!dma)
                return NULL;
 
-       /* The Loongson GMAC devices are based on the DW GMAC
+       /* The Loongson GMAC and GNET devices are based on the DW GMAC
         * v3.50a and v3.73a IP-cores. But the HW designers have changed the
         * GMAC_VERSION.SNPSVER field to the custom 0x10 value on the
         * network controllers with the multi-channels feature
@@ -319,8 +377,19 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)
        if (mac->multicast_filter_bins)
                mac->mcast_bits_log2 = ilog2(mac->multicast_filter_bins);
 
-       /* Loongson GMAC doesn't support the flow control. */
-       mac->link.caps = MAC_10 | MAC_100 | MAC_1000;
+       /* Loongson GMAC doesn't support the flow control. LS2K2000
+        * GNET doesn't support the half-duplex link mode.
+        */
+       if (pdev->device == PCI_DEVICE_ID_LOONGSON_GMAC) {
+               mac->link.caps = MAC_10 | MAC_100 | MAC_1000;
+       } else {
+               if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN)
+                       mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+                                        MAC_10 | MAC_100 | MAC_1000;
+               else
+                       mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+                                        MAC_10FD | MAC_100FD | MAC_1000FD;
+       }
 
        mac->link.duplex = GMAC_CONTROL_DM;
        mac->link.speed10 = GMAC_CONTROL_PS;
@@ -497,6 +566,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
 
        plat->bsp_priv = ld;
        plat->setup = loongson_dwmac_setup;
+       ld->dev = &pdev->dev;
        ld->loongson_id = readl(res.addr + GMAC_VERSION) & 0xff;
 
        info = (struct stmmac_pci_info *)id->driver_data;
@@ -597,6 +667,7 @@ static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend,
 
 static const struct pci_device_id loongson_dwmac_id_table[] = {
        { PCI_DEVICE_DATA(LOONGSON, GMAC, &loongson_gmac_pci_info) },
+       { PCI_DEVICE_DATA(LOONGSON, GNET, &loongson_gnet_pci_info) },
        {}
 };
 MODULE_DEVICE_TABLE(pci, loongson_dwmac_id_table);