drm/i915/guc: Debug print LRC state entries only if the context is pinned

After the context is unpinned the backing memory can also be unpinned,
so any accesses via the lrc_reg_state pointer can end up in unmapped
memory. To avoid that, make sure to only access that memory if the
context is pinned when printing its info.

v2: fix newline alignment

Fixes: 28ff6520a34d ("drm/i915/guc: Update GuC debugfs to support new GuC")
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: <stable@vger.kernel.org> # v5.15+
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250115001334.3875347-1-daniele.ceraolospurio@intel.com
(cherry picked from commit 5bea40687c5cf2a33bf04e9110eb2e2b80222ef5)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index bd4b3d2470e40c915e1bdcb85763c13a32be4584..cc05bd9e43b4958a38cea6629dcf73e2a60cc07c 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -5535,12 +5535,20 @@ static inline void guc_log_context(struct drm_printer *p,
 {
        drm_printf(p, "GuC lrc descriptor %u:\n", ce->guc_id.id);
        drm_printf(p, "\tHW Context Desc: 0x%08x\n", ce->lrc.lrca);
-       drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n",
-                  ce->ring->head,
-                  ce->lrc_reg_state[CTX_RING_HEAD]);
-       drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n",
-                  ce->ring->tail,
-                  ce->lrc_reg_state[CTX_RING_TAIL]);
+       if (intel_context_pin_if_active(ce)) {
+               drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n",
+                          ce->ring->head,
+                          ce->lrc_reg_state[CTX_RING_HEAD]);
+               drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n",
+                          ce->ring->tail,
+                          ce->lrc_reg_state[CTX_RING_TAIL]);
+               intel_context_unpin(ce);
+       } else {
+               drm_printf(p, "\t\tLRC Head: Internal %u, Memory not pinned\n",
+                          ce->ring->head);
+               drm_printf(p, "\t\tLRC Tail: Internal %u, Memory not pinned\n",
+                          ce->ring->tail);
+       }
        drm_printf(p, "\t\tContext Pin Count: %u\n",
                   atomic_read(&ce->pin_count));
        drm_printf(p, "\t\tGuC ID Ref Count: %u\n",