status = "okay";
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- INTERNAL_PHY_SDS(24, 4)
- INTERNAL_PHY_SDS(26, 5)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ INTERNAL_PHY_SDS(24, 4)
+ INTERNAL_PHY_SDS(26, 5)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- INTERNAL_PHY_SDS(24, 4)
- INTERNAL_PHY_SDS(26, 5)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ INTERNAL_PHY_SDS(24, 4)
+ INTERNAL_PHY_SDS(26, 5)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- INTERNAL_PHY_SDS(24, 4)
- INTERNAL_PHY_SDS(26, 5)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ INTERNAL_PHY_SDS(24, 4)
+ INTERNAL_PHY_SDS(26, 5)
};
&switch0 {
status = "okay";
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
- INTERNAL_PHY_SDS(24, 4)
- INTERNAL_PHY_SDS(26, 5)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+ INTERNAL_PHY_SDS(24, 4)
+ INTERNAL_PHY_SDS(26, 5)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
};
&spi0 {
status = "okay";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
};
status = "okay";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(16)
EXTERNAL_PHY(24)
};
status = "okay";
};
-&mdio {
+&mdio_bus0 {
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- INTERNAL_PHY_SDS(24, 4)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ INTERNAL_PHY_SDS(24, 4)
};
&switch0 {
status = "okay";
};
-&mdio {
+&mdio_bus0 {
INTERNAL_PHY_SDS(24, 4)
INTERNAL_PHY_SDS(26, 5)
};
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
};
&switch0 {
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_SFP_PHY_FULL(24, 0)
- EXTERNAL_SFP_PHY_FULL(25, 1)
- EXTERNAL_SFP_PHY_FULL(26, 2)
- EXTERNAL_SFP_PHY_FULL(27, 3)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_SFP_PHY_FULL(24, 0)
+ EXTERNAL_SFP_PHY_FULL(25, 1)
+ EXTERNAL_SFP_PHY_FULL(26, 2)
+ EXTERNAL_SFP_PHY_FULL(27, 3)
};
&switch0 {
status = "okay";
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- INTERNAL_PHY_SDS(24, 4)
- INTERNAL_PHY_SDS(26, 5)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ INTERNAL_PHY_SDS(24, 4)
+ INTERNAL_PHY_SDS(26, 5)
};
&switch0 {
model = "D-Link DGS-1210-16";
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_SFP_PHY(24)
- EXTERNAL_SFP_PHY(25)
- EXTERNAL_SFP_PHY(26)
- EXTERNAL_SFP_PHY(27)
- };
+ EXTERNAL_SFP_PHY(24)
+ EXTERNAL_SFP_PHY(25)
+ EXTERNAL_SFP_PHY(26)
+ EXTERNAL_SFP_PHY(27)
};
&switch0 {
model = "D-Link DGS-1210-20";
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_SFP_PHY(24)
- EXTERNAL_SFP_PHY(25)
- EXTERNAL_SFP_PHY(26)
- EXTERNAL_SFP_PHY(27)
- };
+ EXTERNAL_SFP_PHY(24)
+ EXTERNAL_SFP_PHY(25)
+ EXTERNAL_SFP_PHY(26)
+ EXTERNAL_SFP_PHY(27)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- INTERNAL_PHY_SDS(24, 4)
- INTERNAL_PHY_SDS(26, 5)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ INTERNAL_PHY_SDS(24, 4)
+ INTERNAL_PHY_SDS(26, 5)
};
&switch0 {
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- /* External phy RTL8214FC */
- EXTERNAL_SFP_PHY_FULL(24, 0)
- EXTERNAL_SFP_PHY_FULL(25, 1)
- EXTERNAL_SFP_PHY_FULL(26, 2)
- EXTERNAL_SFP_PHY_FULL(27, 3)
- };
+ /* External phy RTL8214FC */
+ EXTERNAL_SFP_PHY_FULL(24, 0)
+ EXTERNAL_SFP_PHY_FULL(25, 1)
+ EXTERNAL_SFP_PHY_FULL(26, 2)
+ EXTERNAL_SFP_PHY_FULL(27, 3)
};
&switch0 {
model = "HPE 1920-24G (JG924A)";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- EXTERNAL_SFP_PHY_FULL(24, 0)
- EXTERNAL_SFP_PHY_FULL(25, 1)
- EXTERNAL_SFP_PHY_FULL(26, 2)
- EXTERNAL_SFP_PHY_FULL(27, 3)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ EXTERNAL_SFP_PHY_FULL(24, 0)
+ EXTERNAL_SFP_PHY_FULL(25, 1)
+ EXTERNAL_SFP_PHY_FULL(26, 2)
+ EXTERNAL_SFP_PHY_FULL(27, 3)
};
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- EXTERNAL_PHY(24)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ EXTERNAL_PHY(24)
};
&switch0 {
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
};
&switch0 {
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- /* RTL8218FB */
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
- };
+&mdio_bus0 {
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ /* RTL8218FB */
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
};
&switch0 {
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- /* RTL8218FB */
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ /* RTL8218FB */
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
};
&switch0 {
ðernet0 {
nvmem-cells = <&factory_macaddr>;
nvmem-cell-names = "mac-address";
+};
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
};
&switch0 {
model = "Zyxel GS1900-16";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
status = "okay";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
model = "Zyxel GS1900-24E";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
status = "okay";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
status = "okay";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
status = "okay";
};
-&mdio {
+&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
model = "D-Link DGS-1210-52";
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* External phy RTL8218B #1 */
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- /* External phy RTL8218B #2 */
- EXTERNAL_PHY(8)
- EXTERNAL_PHY(9)
- EXTERNAL_PHY(10)
- EXTERNAL_PHY(11)
- EXTERNAL_PHY(12)
- EXTERNAL_PHY(13)
- EXTERNAL_PHY(14)
- EXTERNAL_PHY(15)
-
- /* External phy RTL8218B #3 */
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- /* External phy RTL8218B #4 */
- EXTERNAL_PHY(24)
- EXTERNAL_PHY(25)
- EXTERNAL_PHY(26)
- EXTERNAL_PHY(27)
- EXTERNAL_PHY(28)
- EXTERNAL_PHY(29)
- EXTERNAL_PHY(30)
- EXTERNAL_PHY(31)
-
- /* External phy RTL8218B #5 */
- EXTERNAL_PHY(32)
- EXTERNAL_PHY(33)
- EXTERNAL_PHY(34)
- EXTERNAL_PHY(35)
- EXTERNAL_PHY(36)
- EXTERNAL_PHY(37)
- EXTERNAL_PHY(38)
- EXTERNAL_PHY(39)
-
- /* External phy RTL8218B #6 */
- EXTERNAL_PHY(40)
- EXTERNAL_PHY(41)
- EXTERNAL_PHY(42)
- EXTERNAL_PHY(43)
- EXTERNAL_PHY(44)
- EXTERNAL_PHY(45)
- EXTERNAL_PHY(46)
- EXTERNAL_PHY(47)
-
- /* External phy RTL8214FC */
- EXTERNAL_SFP_PHY_FULL(48, 0)
- EXTERNAL_SFP_PHY_FULL(49, 1)
- EXTERNAL_SFP_PHY_FULL(50, 2)
- EXTERNAL_SFP_PHY_FULL(51, 3)
- };
+&mdio_bus0 {
+ /* External phy RTL8218B #1 */
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ /* External phy RTL8218B #2 */
+ EXTERNAL_PHY(8)
+ EXTERNAL_PHY(9)
+ EXTERNAL_PHY(10)
+ EXTERNAL_PHY(11)
+ EXTERNAL_PHY(12)
+ EXTERNAL_PHY(13)
+ EXTERNAL_PHY(14)
+ EXTERNAL_PHY(15)
+
+ /* External phy RTL8218B #3 */
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ /* External phy RTL8218B #4 */
+ EXTERNAL_PHY(24)
+ EXTERNAL_PHY(25)
+ EXTERNAL_PHY(26)
+ EXTERNAL_PHY(27)
+ EXTERNAL_PHY(28)
+ EXTERNAL_PHY(29)
+ EXTERNAL_PHY(30)
+ EXTERNAL_PHY(31)
+
+ /* External phy RTL8218B #5 */
+ EXTERNAL_PHY(32)
+ EXTERNAL_PHY(33)
+ EXTERNAL_PHY(34)
+ EXTERNAL_PHY(35)
+ EXTERNAL_PHY(36)
+ EXTERNAL_PHY(37)
+ EXTERNAL_PHY(38)
+ EXTERNAL_PHY(39)
+
+ /* External phy RTL8218B #6 */
+ EXTERNAL_PHY(40)
+ EXTERNAL_PHY(41)
+ EXTERNAL_PHY(42)
+ EXTERNAL_PHY(43)
+ EXTERNAL_PHY(44)
+ EXTERNAL_PHY(45)
+ EXTERNAL_PHY(46)
+ EXTERNAL_PHY(47)
+
+ /* External phy RTL8214FC */
+ EXTERNAL_SFP_PHY_FULL(48, 0)
+ EXTERNAL_SFP_PHY_FULL(49, 1)
+ EXTERNAL_SFP_PHY_FULL(50, 2)
+ EXTERNAL_SFP_PHY_FULL(51, 3)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- EXTERNAL_SFP_PHY_FULL(48, 0)
- EXTERNAL_SFP_PHY_FULL(49, 1)
- EXTERNAL_SFP_PHY_FULL(50, 2)
- EXTERNAL_SFP_PHY_FULL(51, 3)
- };
+&mdio_bus0 {
+ EXTERNAL_SFP_PHY_FULL(48, 0)
+ EXTERNAL_SFP_PHY_FULL(49, 1)
+ EXTERNAL_SFP_PHY_FULL(50, 2)
+ EXTERNAL_SFP_PHY_FULL(51, 3)
};
-
&switch0 {
ports {
SWITCH_PORT(48, 49, qsgmii)
};
-ðernet0 {
- mdio: mdio-bus {
- EXTERNAL_SFP_PHY_FULL(48, 1)
- EXTERNAL_SFP_PHY_FULL(49, 3)
- EXTERNAL_SFP_PHY_FULL(50, 0)
- EXTERNAL_SFP_PHY_FULL(51, 2)
- };
+&mdio_bus0 {
+ EXTERNAL_SFP_PHY_FULL(48, 1)
+ EXTERNAL_SFP_PHY_FULL(49, 3)
+ EXTERNAL_SFP_PHY_FULL(50, 0)
+ EXTERNAL_SFP_PHY_FULL(51, 2)
};
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- EXTERNAL_PHY(8)
- EXTERNAL_PHY(9)
- EXTERNAL_PHY(10)
- EXTERNAL_PHY(11)
- EXTERNAL_PHY(12)
- EXTERNAL_PHY(13)
- EXTERNAL_PHY(14)
- EXTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- EXTERNAL_PHY(24)
- EXTERNAL_PHY(25)
- EXTERNAL_PHY(26)
- EXTERNAL_PHY(27)
- EXTERNAL_PHY(28)
- EXTERNAL_PHY(29)
- EXTERNAL_PHY(30)
- EXTERNAL_PHY(31)
-
- EXTERNAL_PHY(32)
- EXTERNAL_PHY(33)
- EXTERNAL_PHY(34)
- EXTERNAL_PHY(35)
- EXTERNAL_PHY(36)
- EXTERNAL_PHY(37)
- EXTERNAL_PHY(38)
- EXTERNAL_PHY(39)
-
- EXTERNAL_PHY(40)
- EXTERNAL_PHY(41)
- EXTERNAL_PHY(42)
- EXTERNAL_PHY(43)
- EXTERNAL_PHY(44)
- EXTERNAL_PHY(45)
- EXTERNAL_PHY(46)
- EXTERNAL_PHY(47)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ EXTERNAL_PHY(8)
+ EXTERNAL_PHY(9)
+ EXTERNAL_PHY(10)
+ EXTERNAL_PHY(11)
+ EXTERNAL_PHY(12)
+ EXTERNAL_PHY(13)
+ EXTERNAL_PHY(14)
+ EXTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ EXTERNAL_PHY(24)
+ EXTERNAL_PHY(25)
+ EXTERNAL_PHY(26)
+ EXTERNAL_PHY(27)
+ EXTERNAL_PHY(28)
+ EXTERNAL_PHY(29)
+ EXTERNAL_PHY(30)
+ EXTERNAL_PHY(31)
+
+ EXTERNAL_PHY(32)
+ EXTERNAL_PHY(33)
+ EXTERNAL_PHY(34)
+ EXTERNAL_PHY(35)
+ EXTERNAL_PHY(36)
+ EXTERNAL_PHY(37)
+ EXTERNAL_PHY(38)
+ EXTERNAL_PHY(39)
+
+ EXTERNAL_PHY(40)
+ EXTERNAL_PHY(41)
+ EXTERNAL_PHY(42)
+ EXTERNAL_PHY(43)
+ EXTERNAL_PHY(44)
+ EXTERNAL_PHY(45)
+ EXTERNAL_PHY(46)
+ EXTERNAL_PHY(47)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- // Switch doesn't come back properly after a reset so don't.
- // reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
-
- /* External phy RTL8218B #1 */
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- /* External phy RTL8218B #2 */
- EXTERNAL_PHY(8)
- EXTERNAL_PHY(9)
- EXTERNAL_PHY(10)
- EXTERNAL_PHY(11)
- EXTERNAL_PHY(12)
- EXTERNAL_PHY(13)
- EXTERNAL_PHY(14)
- EXTERNAL_PHY(15)
-
- /* External phy RTL8218B #3 */
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- /* External phy RTL8218B #4 */
- EXTERNAL_PHY(24)
- EXTERNAL_PHY(25)
- EXTERNAL_PHY(26)
- EXTERNAL_PHY(27)
- EXTERNAL_PHY(28)
- EXTERNAL_PHY(29)
- EXTERNAL_PHY(30)
- EXTERNAL_PHY(31)
-
- /* External phy RTL8218B #5 */
- EXTERNAL_PHY(32)
- EXTERNAL_PHY(33)
- EXTERNAL_PHY(34)
- EXTERNAL_PHY(35)
- EXTERNAL_PHY(36)
- EXTERNAL_PHY(37)
- EXTERNAL_PHY(38)
- EXTERNAL_PHY(39)
-
- /* External phy RTL8218B #6 */
- EXTERNAL_PHY(40)
- EXTERNAL_PHY(41)
- EXTERNAL_PHY(42)
- EXTERNAL_PHY(43)
- EXTERNAL_PHY(44)
- EXTERNAL_PHY(45)
- EXTERNAL_PHY(46)
- EXTERNAL_PHY(47)
-
- /* RTL8393 Internal SerDes */
- INTERNAL_PHY(48)
- INTERNAL_PHY(49)
- };
+&mdio_bus0 {
+ // Switch doesn't come back properly after a reset so don't.
+ // reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+
+ /* External phy RTL8218B #1 */
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ /* External phy RTL8218B #2 */
+ EXTERNAL_PHY(8)
+ EXTERNAL_PHY(9)
+ EXTERNAL_PHY(10)
+ EXTERNAL_PHY(11)
+ EXTERNAL_PHY(12)
+ EXTERNAL_PHY(13)
+ EXTERNAL_PHY(14)
+ EXTERNAL_PHY(15)
+
+ /* External phy RTL8218B #3 */
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ /* External phy RTL8218B #4 */
+ EXTERNAL_PHY(24)
+ EXTERNAL_PHY(25)
+ EXTERNAL_PHY(26)
+ EXTERNAL_PHY(27)
+ EXTERNAL_PHY(28)
+ EXTERNAL_PHY(29)
+ EXTERNAL_PHY(30)
+ EXTERNAL_PHY(31)
+
+ /* External phy RTL8218B #5 */
+ EXTERNAL_PHY(32)
+ EXTERNAL_PHY(33)
+ EXTERNAL_PHY(34)
+ EXTERNAL_PHY(35)
+ EXTERNAL_PHY(36)
+ EXTERNAL_PHY(37)
+ EXTERNAL_PHY(38)
+ EXTERNAL_PHY(39)
+
+ /* External phy RTL8218B #6 */
+ EXTERNAL_PHY(40)
+ EXTERNAL_PHY(41)
+ EXTERNAL_PHY(42)
+ EXTERNAL_PHY(43)
+ EXTERNAL_PHY(44)
+ EXTERNAL_PHY(45)
+ EXTERNAL_PHY(46)
+ EXTERNAL_PHY(47)
+
+ /* RTL8393 Internal SerDes */
+ INTERNAL_PHY(48)
+ INTERNAL_PHY(49)
};
&switch0 {
};
};
-ðernet0 {
- mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- EXTERNAL_PHY(8)
- EXTERNAL_PHY(9)
- EXTERNAL_PHY(10)
- EXTERNAL_PHY(11)
- EXTERNAL_PHY(12)
- EXTERNAL_PHY(13)
- EXTERNAL_PHY(14)
- EXTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- EXTERNAL_PHY(24)
- EXTERNAL_PHY(25)
- EXTERNAL_PHY(26)
- EXTERNAL_PHY(27)
- EXTERNAL_PHY(28)
- EXTERNAL_PHY(29)
- EXTERNAL_PHY(30)
- EXTERNAL_PHY(31)
-
- EXTERNAL_PHY(32)
- EXTERNAL_PHY(33)
- EXTERNAL_PHY(34)
- EXTERNAL_PHY(35)
- EXTERNAL_PHY(36)
- EXTERNAL_PHY(37)
- EXTERNAL_PHY(38)
- EXTERNAL_PHY(39)
-
- /* RTL8218FB */
- EXTERNAL_PHY(40)
- EXTERNAL_PHY(41)
- EXTERNAL_PHY(42)
- EXTERNAL_PHY(43)
- EXTERNAL_PHY(44)
- EXTERNAL_PHY(45)
- EXTERNAL_PHY(46)
- EXTERNAL_PHY(47)
- };
+&mdio_bus0 {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ EXTERNAL_PHY(8)
+ EXTERNAL_PHY(9)
+ EXTERNAL_PHY(10)
+ EXTERNAL_PHY(11)
+ EXTERNAL_PHY(12)
+ EXTERNAL_PHY(13)
+ EXTERNAL_PHY(14)
+ EXTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ EXTERNAL_PHY(24)
+ EXTERNAL_PHY(25)
+ EXTERNAL_PHY(26)
+ EXTERNAL_PHY(27)
+ EXTERNAL_PHY(28)
+ EXTERNAL_PHY(29)
+ EXTERNAL_PHY(30)
+ EXTERNAL_PHY(31)
+
+ EXTERNAL_PHY(32)
+ EXTERNAL_PHY(33)
+ EXTERNAL_PHY(34)
+ EXTERNAL_PHY(35)
+ EXTERNAL_PHY(36)
+ EXTERNAL_PHY(37)
+ EXTERNAL_PHY(38)
+ EXTERNAL_PHY(39)
+
+ /* RTL8218FB */
+ EXTERNAL_PHY(40)
+ EXTERNAL_PHY(41)
+ EXTERNAL_PHY(42)
+ EXTERNAL_PHY(43)
+ EXTERNAL_PHY(44)
+ EXTERNAL_PHY(45)
+ EXTERNAL_PHY(46)
+ EXTERNAL_PHY(47)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* External phy RTL8218B #1 */
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- /* External phy RTL8218B #2 */
- EXTERNAL_PHY(8)
- EXTERNAL_PHY(9)
- EXTERNAL_PHY(10)
- EXTERNAL_PHY(11)
- EXTERNAL_PHY(12)
- EXTERNAL_PHY(13)
- EXTERNAL_PHY(14)
- EXTERNAL_PHY(15)
-
- /* External phy RTL8218B #3 */
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- /* External phy RTL8218B #4 */
- EXTERNAL_PHY(24)
- EXTERNAL_PHY(25)
- EXTERNAL_PHY(26)
- EXTERNAL_PHY(27)
- EXTERNAL_PHY(28)
- EXTERNAL_PHY(29)
- EXTERNAL_PHY(30)
- EXTERNAL_PHY(31)
-
- /* External phy RTL8218B #5 */
- EXTERNAL_PHY(32)
- EXTERNAL_PHY(33)
- EXTERNAL_PHY(34)
- EXTERNAL_PHY(35)
- EXTERNAL_PHY(36)
- EXTERNAL_PHY(37)
- EXTERNAL_PHY(38)
- EXTERNAL_PHY(39)
-
- /* External phy RTL8218B #6 */
- EXTERNAL_PHY(40)
- EXTERNAL_PHY(41)
- EXTERNAL_PHY(42)
- EXTERNAL_PHY(43)
- EXTERNAL_PHY(44)
- EXTERNAL_PHY(45)
- EXTERNAL_PHY(46)
- EXTERNAL_PHY(47)
-
- /* RTL8393 Internal SerDes */
- INTERNAL_PHY_SDS(48, 12)
- INTERNAL_PHY_SDS(49, 13)
- };
+&mdio_bus0 {
+ /* External phy RTL8218B #1 */
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ /* External phy RTL8218B #2 */
+ EXTERNAL_PHY(8)
+ EXTERNAL_PHY(9)
+ EXTERNAL_PHY(10)
+ EXTERNAL_PHY(11)
+ EXTERNAL_PHY(12)
+ EXTERNAL_PHY(13)
+ EXTERNAL_PHY(14)
+ EXTERNAL_PHY(15)
+
+ /* External phy RTL8218B #3 */
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ /* External phy RTL8218B #4 */
+ EXTERNAL_PHY(24)
+ EXTERNAL_PHY(25)
+ EXTERNAL_PHY(26)
+ EXTERNAL_PHY(27)
+ EXTERNAL_PHY(28)
+ EXTERNAL_PHY(29)
+ EXTERNAL_PHY(30)
+ EXTERNAL_PHY(31)
+
+ /* External phy RTL8218B #5 */
+ EXTERNAL_PHY(32)
+ EXTERNAL_PHY(33)
+ EXTERNAL_PHY(34)
+ EXTERNAL_PHY(35)
+ EXTERNAL_PHY(36)
+ EXTERNAL_PHY(37)
+ EXTERNAL_PHY(38)
+ EXTERNAL_PHY(39)
+
+ /* External phy RTL8218B #6 */
+ EXTERNAL_PHY(40)
+ EXTERNAL_PHY(41)
+ EXTERNAL_PHY(42)
+ EXTERNAL_PHY(43)
+ EXTERNAL_PHY(44)
+ EXTERNAL_PHY(45)
+ EXTERNAL_PHY(46)
+ EXTERNAL_PHY(47)
+
+ /* RTL8393 Internal SerDes */
+ INTERNAL_PHY_SDS(48, 12)
+ INTERNAL_PHY_SDS(49, 13)
};
&switch0 {
ðernet0 {
nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
+};
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* External RTL8224 PHY */
- phy0: ethernet-phy@0 {
- reg = <0>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 0>;
- sds = < 2 >;
- };
+&mdio_bus0 {
+ /* External RTL8224 PHY */
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 0>;
+ sds = < 2 >;
+ };
- phy1: ethernet-phy@1 {
- reg = <1>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 1>;
- sds = < 2 >;
- };
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 1>;
+ sds = < 2 >;
+ };
- phy2: ethernet-phy@2 {
- reg = <2>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 2>;
- sds = < 2 >;
- };
+ phy2: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 2>;
+ sds = < 2 >;
+ };
- phy3: ethernet-phy@3 {
- reg = <3>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 3>;
- sds = < 2 >;
- };
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 3>;
+ sds = < 2 >;
+ };
- phy8: ethernet-phy@8 {
- reg = <8>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 4>;
- sds = < 3 >;
- };
+ phy8: ethernet-phy@8 {
+ reg = <8>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 4>;
+ sds = < 3 >;
+ };
- phy9: ethernet-phy@9 {
- reg = <9>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 5>;
- sds = < 3 >;
- };
+ phy9: ethernet-phy@9 {
+ reg = <9>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 5>;
+ sds = < 3 >;
+ };
- phy10: ethernet-phy@10 {
- reg = <10>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 6>;
- sds = < 3 >;
- };
+ phy10: ethernet-phy@10 {
+ reg = <10>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 6>;
+ sds = < 3 >;
+ };
- phy11: ethernet-phy@11 {
- reg = <11>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 7>;
- sds = < 3 >;
- };
+ phy11: ethernet-phy@11 {
+ reg = <11>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 7>;
+ sds = < 3 >;
};
};
};
};
-&mdio {
+&mdio_bus0 {
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
};
model = "Zyxel XGS1210-12 A1 Switch";
};
-&mdio {
+&mdio_bus0 {
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* External RTL8218D PHY */
- phy0: ethernet-phy@0 {
- reg = <0>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 0>;
- sds = < 2 >;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
- phy1: ethernet-phy@1 {
- reg = <1>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 1>;
- };
- phy2: ethernet-phy@2 {
- reg = <2>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 2>;
- };
- phy3: ethernet-phy@3 {
- reg = <3>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 3>;
- };
- phy4: ethernet-phy@4 {
- reg = <4>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 4>;
- };
- phy5: ethernet-phy@5 {
- reg = <5>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 5>;
- };
- phy6: ethernet-phy@6 {
- reg = <6>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 6>;
- };
- phy7: ethernet-phy@7 {
- reg = <7>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 7>;
- };
-
- INTERNAL_PHY_SDS(26, 8)
- INTERNAL_PHY_SDS(27, 9)
+&mdio_bus0 {
+ /* External RTL8218D PHY */
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 0>;
+ sds = < 2 >;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 1>;
};
+ phy2: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 2>;
+ };
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 3>;
+ };
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 4>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 5>;
+ };
+ phy6: ethernet-phy@6 {
+ reg = <6>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 6>;
+ };
+ phy7: ethernet-phy@7 {
+ reg = <7>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 7>;
+ };
+
+ INTERNAL_PHY_SDS(26, 8)
+ INTERNAL_PHY_SDS(27, 9)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* External RTL8218D PHY */
- phy0: ethernet-phy@0 {
- reg = <0>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 0>;
- sds = < 2 >;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
- phy1: ethernet-phy@1 {
- reg = <1>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 1>;
- };
- phy2: ethernet-phy@2 {
- reg = <2>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 2>;
- };
- phy3: ethernet-phy@3 {
- reg = <3>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 3>;
- };
- phy4: ethernet-phy@4 {
- reg = <4>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 4>;
- };
- phy5: ethernet-phy@5 {
- reg = <5>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 5>;
- };
- phy6: ethernet-phy@6 {
- reg = <6>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 6>;
- };
- phy7: ethernet-phy@7 {
- reg = <7>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 7>;
- };
-
- /* External Aquantia 113C PHYs */
- phy24: ethernet-phy@24 {
- reg = <24>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <1 8>;
- sds = < 6 >;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- #thermal-sensor-cells = <0>;
- };
+&mdio_bus0 {
+ /* External RTL8218D PHY */
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 0>;
+ sds = < 2 >;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 1>;
+ };
+ phy2: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 2>;
+ };
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 3>;
+ };
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 4>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 5>;
+ };
+ phy6: ethernet-phy@6 {
+ reg = <6>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 6>;
+ };
+ phy7: ethernet-phy@7 {
+ reg = <7>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ rtl9300,smi-address = <0 7>;
+ };
- phy25: ethernet-phy@25 {
- reg = <25>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <2 8>;
- sds = < 7 >;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- #thermal-sensor-cells = <0>;
- };
+ /* External Aquantia 113C PHYs */
+ phy24: ethernet-phy@24 {
+ reg = <24>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 8>;
+ sds = < 6 >;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ #thermal-sensor-cells = <0>;
+ };
- phy26: ethernet-phy@26 {
- reg = <26>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <3 8>;
- sds = < 8 >;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- #thermal-sensor-cells = <0>;
- };
+ phy25: ethernet-phy@25 {
+ reg = <25>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <2 8>;
+ sds = < 7 >;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ #thermal-sensor-cells = <0>;
+ };
- INTERNAL_PHY_SDS(27, 9)
+ phy26: ethernet-phy@26 {
+ reg = <26>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 8>;
+ sds = < 8 >;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ #thermal-sensor-cells = <0>;
};
+
+ INTERNAL_PHY_SDS(27, 9)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 0>;
- reg = <0>;
- sds = <2>;
- };
+&mdio_bus0 {
+ phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 0>;
+ reg = <0>;
+ sds = <2>;
+ };
- phy8: ethernet-phy@8 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 1>;
- reg = <8>;
- sds = <3>;
- };
+ phy8: ethernet-phy@8 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 1>;
+ reg = <8>;
+ sds = <3>;
+ };
- phy16: ethernet-phy@16 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 2>;
- reg = <16>;
- sds = <4>;
- };
+ phy16: ethernet-phy@16 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 2>;
+ reg = <16>;
+ sds = <4>;
+ };
- phy20: ethernet-phy@20 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <0 3>;
- reg = <20>;
- sds = <5>;
- };
+ phy20: ethernet-phy@20 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 3>;
+ reg = <20>;
+ sds = <5>;
+ };
- phy24: ethernet-phy@24 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <3 16>;
- reg = <24>;
- sds = <6>;
- };
+ phy24: ethernet-phy@24 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 16>;
+ reg = <24>;
+ sds = <6>;
+ };
- phy25: ethernet-phy@25 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <3 17>;
- reg = <25>;
- sds = <7>;
- };
+ phy25: ethernet-phy@25 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 17>;
+ reg = <25>;
+ sds = <7>;
+ };
- phy26: ethernet-phy@26 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <3 18>;
- reg = <26>;
- sds = <8>;
- };
+ phy26: ethernet-phy@26 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 18>;
+ reg = <26>;
+ sds = <8>;
+ };
- phy27: ethernet-phy@27 {
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <3 19>;
- reg = <27>;
- sds = <9>;
- };
+ phy27: ethernet-phy@27 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 19>;
+ reg = <27>;
+ sds = <9>;
};
};
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY_SDS(0, 2)
- INTERNAL_PHY_SDS(8, 3)
- INTERNAL_PHY_SDS(16, 4)
- INTERNAL_PHY_SDS(20, 5)
- INTERNAL_PHY_SDS(24, 6)
- INTERNAL_PHY_SDS(25, 7)
- INTERNAL_PHY_SDS(26, 8)
- INTERNAL_PHY_SDS(27, 9)
- };
+&mdio_bus0 {
+ INTERNAL_PHY_SDS(0, 2)
+ INTERNAL_PHY_SDS(8, 3)
+ INTERNAL_PHY_SDS(16, 4)
+ INTERNAL_PHY_SDS(20, 5)
+ INTERNAL_PHY_SDS(24, 6)
+ INTERNAL_PHY_SDS(25, 7)
+ INTERNAL_PHY_SDS(26, 8)
+ INTERNAL_PHY_SDS(27, 9)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY_SDS(0, 2)
- INTERNAL_PHY_SDS(8, 3)
- INTERNAL_PHY_SDS(16, 4)
- INTERNAL_PHY_SDS(20, 5)
- INTERNAL_PHY_SDS(24, 6)
- INTERNAL_PHY_SDS(25, 7)
- INTERNAL_PHY_SDS(26, 8)
- INTERNAL_PHY_SDS(27, 9)
- };
+&mdio_bus0 {
+ INTERNAL_PHY_SDS(0, 2)
+ INTERNAL_PHY_SDS(8, 3)
+ INTERNAL_PHY_SDS(16, 4)
+ INTERNAL_PHY_SDS(20, 5)
+ INTERNAL_PHY_SDS(24, 6)
+ INTERNAL_PHY_SDS(25, 7)
+ INTERNAL_PHY_SDS(26, 8)
+ INTERNAL_PHY_SDS(27, 9)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY_SDS(0, 2)
- INTERNAL_PHY_SDS(8, 3)
- INTERNAL_PHY_SDS(16, 4)
- INTERNAL_PHY_SDS(20, 5)
- INTERNAL_PHY_SDS(24, 6)
- INTERNAL_PHY_SDS(25, 7)
- INTERNAL_PHY_SDS(26, 8)
- INTERNAL_PHY_SDS(27, 9)
- };
+&mdio_bus0 {
+ INTERNAL_PHY_SDS(0, 2)
+ INTERNAL_PHY_SDS(8, 3)
+ INTERNAL_PHY_SDS(16, 4)
+ INTERNAL_PHY_SDS(20, 5)
+ INTERNAL_PHY_SDS(24, 6)
+ INTERNAL_PHY_SDS(25, 7)
+ INTERNAL_PHY_SDS(26, 8)
+ INTERNAL_PHY_SDS(27, 9)
};
&switch0 {
};
};
-ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- INTERNAL_PHY_SDS(0, 2)
- INTERNAL_PHY_SDS(8, 3)
- INTERNAL_PHY_SDS(16, 4)
- INTERNAL_PHY_SDS(20, 5)
- INTERNAL_PHY_SDS(24, 6)
- INTERNAL_PHY_SDS(25, 7)
- INTERNAL_PHY_SDS(26, 8)
- INTERNAL_PHY_SDS(27, 9)
- };
+&mdio_bus0 {
+ INTERNAL_PHY_SDS(0, 2)
+ INTERNAL_PHY_SDS(8, 3)
+ INTERNAL_PHY_SDS(16, 4)
+ INTERNAL_PHY_SDS(20, 5)
+ INTERNAL_PHY_SDS(24, 6)
+ INTERNAL_PHY_SDS(25, 7)
+ INTERNAL_PHY_SDS(26, 8)
+ INTERNAL_PHY_SDS(27, 9)
};
&switch0 {
int ret;
u32 pn;
- np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-eth");
+ np = of_find_compatible_node(NULL, NULL, "realtek,otto-mdio");
if (!np) {
- dev_err(priv->dev, "ethernet node not found");
+ dev_err(priv->dev, "mdio controller node not found");
return -ENODEV;
}
static int rtmdio_probe(struct platform_device *pdev)
{
- struct device_node *dn, *np, *mii_np;
+ struct device_node *dn, *mii_np;
struct device *dev = &pdev->dev;
struct rtmdio_bus_priv *priv;
struct mii_bus *bus;
family = rtmdio_get_family();
dev_info(dev, "probing RTL%04x family mdio bus\n", family);
- np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-eth");
- if (!np)
- return -ENODEV;
-
- mii_np = of_get_child_by_name(np, "mdio-bus");
+ mii_np = of_get_child_by_name(dev->of_node, "mdio-bus");
if (!mii_np)
return -ENODEV;