gpu: host1x: Add MLOCK recovery for rest of engines

Add class IDs / MLOCKs for MLOCK recovery for rest of engines
present on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240425050238.2943404-4-cyndis@kapsi.fi

diff --git a/drivers/gpu/host1x/hw/cdma_hw.c b/drivers/gpu/host1x/hw/cdma_hw.c
index 1b65a10b9dfcf506a53e0140d8a302af6c00b079..3f3f0018eee0d595e7a2b21c83ff457ba2cea2b5 100644 (file)
--- a/drivers/gpu/host1x/hw/cdma_hw.c
+++ b/drivers/gpu/host1x/hw/cdma_hw.c
@@ -254,12 +254,24 @@ static void timeout_release_mlock(struct host1x_cdma *cdma)
        u32 offset;
 
        switch (ch->client->class) {
+       case HOST1X_CLASS_NVJPG1:
+               offset = HOST1X_COMMON_NVJPG1_MLOCK;
+               break;
+       case HOST1X_CLASS_NVENC:
+               offset = HOST1X_COMMON_NVENC_MLOCK;
+               break;
        case HOST1X_CLASS_VIC:
                offset = HOST1X_COMMON_VIC_MLOCK;
                break;
+       case HOST1X_CLASS_NVJPG:
+               offset = HOST1X_COMMON_NVJPG_MLOCK;
+               break;
        case HOST1X_CLASS_NVDEC:
                offset = HOST1X_COMMON_NVDEC_MLOCK;
                break;
+       case HOST1X_CLASS_OFA:
+               offset = HOST1X_COMMON_OFA_MLOCK;
+               break;
        default:
                WARN(1, "%s was not updated for class %u", __func__, ch->client->class);
                return;

diff --git a/include/linux/host1x.h b/include/linux/host1x.h
index 9c8119ed13a4b78cc2a321116a0028797563a56f..5a7a81e5f9bd0443edde75fc2350bd05134d37cd 100644 (file)
--- a/include/linux/host1x.h
+++ b/include/linux/host1x.h
@@ -14,12 +14,17 @@
 
 enum host1x_class {
        HOST1X_CLASS_HOST1X = 0x1,
+       HOST1X_CLASS_NVJPG1 = 0x7,
+       HOST1X_CLASS_NVENC = 0x21,
+       HOST1X_CLASS_NVENC1 = 0x22,
        HOST1X_CLASS_GR2D = 0x51,
        HOST1X_CLASS_GR2D_SB = 0x52,
        HOST1X_CLASS_VIC = 0x5D,
        HOST1X_CLASS_GR3D = 0x60,
+       HOST1X_CLASS_NVJPG = 0xC0,
        HOST1X_CLASS_NVDEC = 0xF0,
        HOST1X_CLASS_NVDEC1 = 0xF5,
+       HOST1X_CLASS_OFA = 0xF8,
 };
 
 struct host1x;