rs6000: Make all insert instructions one type

This uses the attribute "size" to specify the differences:

	insert_word  -> insert size=32
	insert_dword -> insert size=64

It could use "dot" as well, but the current code doesn't handle that.

From-SVN: r210868

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 89c4f21431acbcd55d98895f6eb803ac5ae03e28..b0a478a27b38f0974950aa8d1ef3b41d76884256 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,39 @@
+2014-05-23  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (type): Delete "insert_word",
+       "insert_dword".  Add "insert".
+       (size): Update comment.
+       * config/rs6000/rs6000.c (rs6000_adjust_cost, is_cracked_insn,
+       insn_must_be_first_in_group): Adjust.
+       (insvsi_internal, *insvsi_internal1, *insvsi_internal2,
+       *insvsi_internal3, *insvsi_internal4, *insvsi_internal5,
+       *insvsi_internal6, insvdi_internal): Adjust.
+
+       * config/rs6000/40x.md (ppc403-integer): Adjust.
+       * config/rs6000/440.md (ppc440-integer): Adjust.
+       * config/rs6000/476.md (ppc476-simple-integer): Adjust.
+       * config/rs6000/601.md (ppc601-integer): Adjust.
+       * config/rs6000/603.md (ppc603-integer): Adjust.
+       * config/rs6000/6xx.md (ppc604-integer): Adjust.
+       * config/rs6000/7450.md (ppc7450-integer): Adjust.
+       * config/rs6000/7xx.md (ppc750-integer): Adjust.
+       * config/rs6000/8540.md (ppc8540_su): Adjust.
+       * config/rs6000/cell.md (cell-integer, cell-insert): Adjust.
+       * config/rs6000/e300c2c3.md (ppce300c3_iu): Adjust.
+       * config/rs6000/e500mc.md (e500mc_su): Adjust.
+       * config/rs6000/e500mc64.md (e500mc64_su): Adjust.
+       * config/rs6000/e5500.md (e5500_sfx): Adjust.
+       * config/rs6000/e6500.md (e6500_sfx): Adjust.
+       * config/rs6000/mpc.md (mpccore-integer): Adjust.
+       * config/rs6000/power4.md (power4-integer, power4-insert): Adjust.
+       * config/rs6000/power5.md (power5-integer, power5-insert): Adjust.
+       * config/rs6000/power6.md (power6-insert, power6-insert-dword):
+       Adjust.
+       * config/rs6000/power7.md (power7-integer): Adjust.
+       * config/rs6000/power8.md (power8-1cyc): Adjust.
+       * config/rs6000/rs64.md (rs64a-integer): Adjust.
+       * config/rs6000/titan.md (titan_fxu_shift_and_rotate): Adjust.
+
 2014-05-23  Segher Boessenkool  <segher@kernel.crashing.org>
 
        * config/rs6000/rs6000.md (type): Add "mul".  Delete "imul",

diff --git a/gcc/config/rs6000/40x.md b/gcc/config/rs6000/40x.md
index 7ec2801144635fbe25b02ad5e4f4adc404b7ffb1..02971cbeef47cc6ee417bd55c218b64ba567cb96 100644 (file)
--- a/gcc/config/rs6000/40x.md
+++ b/gcc/config/rs6000/40x.md
@@ -36,7 +36,7 @@
   "iu_40x")
 
 (define_insn_reservation "ppc403-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc403,ppc405"))
   "iu_40x")

diff --git a/gcc/config/rs6000/440.md b/gcc/config/rs6000/440.md
index 55d115580bfc37505c87cbbd4b6f878d4567cc73..292177d5e14e006a225eb4e33722e84b43ae183d 100644 (file)
--- a/gcc/config/rs6000/440.md
+++ b/gcc/config/rs6000/440.md
@@ -53,7 +53,7 @@
   "ppc440_issue,ppc440_l_pipe")
 
 (define_insn_reservation "ppc440-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
+  (and (eq_attr "type" "integer,insert,shift,\
                         trap,var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc440"))
   "ppc440_issue,ppc440_i_pipe|ppc440_j_pipe")

diff --git a/gcc/config/rs6000/476.md b/gcc/config/rs6000/476.md
index 7b00632165074cc82be64cc99d97a0ac641ba96b..403752a9d620089e056bd2e2dff679c2b5e281f5 100644 (file)
--- a/gcc/config/rs6000/476.md
+++ b/gcc/config/rs6000/476.md
@@ -63,7 +63,7 @@
    ppc476_lj_pipe")
 
 (define_insn_reservation "ppc476-simple-integer" 1
-  (and (eq_attr "type" "integer,insert_word,var_shift_rotate,exts,shift")
+  (and (eq_attr "type" "integer,insert,var_shift_rotate,exts,shift")
        (eq_attr "cpu" "ppc476"))
   "ppc476_issue,\
    ppc476_i_pipe|ppc476_lj_pipe")

diff --git a/gcc/config/rs6000/601.md b/gcc/config/rs6000/601.md
index c1a00438859d61ce18040688b5c5001045331ddb..d0afcf710ac98ce92d23c697685cc37b1352724f 100644 (file)
--- a/gcc/config/rs6000/601.md
+++ b/gcc/config/rs6000/601.md
@@ -45,7 +45,7 @@
   "iu_ppc601+fpu_ppc601")
 
 (define_insn_reservation "ppc601-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
+  (and (eq_attr "type" "integer,insert,shift,\
                         trap,var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc601"))
   "iu_ppc601")

diff --git a/gcc/config/rs6000/603.md b/gcc/config/rs6000/603.md
index 7e411264fd518e7b43e5cdfcbec2ff98af3cfd31..e6cc444362bdc3517f59acc9eb5f939e5e6c5e96 100644 (file)
--- a/gcc/config/rs6000/603.md
+++ b/gcc/config/rs6000/603.md
@@ -58,7 +58,7 @@
   "lsu_603")
 
 (define_insn_reservation "ppc603-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc603"))
   "iu_603")

diff --git a/gcc/config/rs6000/6xx.md b/gcc/config/rs6000/6xx.md
index 429e8628fc6e98f72ca72a13f41c4f13fb6f107b..3a3271e6eff5176558763e81feeea5a48234316e 100644 (file)
--- a/gcc/config/rs6000/6xx.md
+++ b/gcc/config/rs6000/6xx.md
@@ -73,7 +73,7 @@
   "lsu_6xx")
   
 (define_insn_reservation "ppc604-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
   "iu1_6xx|iu2_6xx")

diff --git a/gcc/config/rs6000/7450.md b/gcc/config/rs6000/7450.md
index b7b5efd0898f1190f775e79691d49bd4c0c11d67..a6a4a1b1b49afad539603283254344d65da4173b 100644 (file)
--- a/gcc/config/rs6000/7450.md
+++ b/gcc/config/rs6000/7450.md
@@ -73,7 +73,7 @@
   "ppc7450_du,lsu_7450")
 
 (define_insn_reservation "ppc7450-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
+  (and (eq_attr "type" "integer,insert,shift,\
                         trap,var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc7450"))
   "ppc7450_du,iu1_7450|iu2_7450|iu3_7450")

diff --git a/gcc/config/rs6000/7xx.md b/gcc/config/rs6000/7xx.md
index 059d006f2545bf783fff0abd89627056ab8b978f..332a663f36056d01d8ed8197a2e2f4a93896ba49 100644 (file)
--- a/gcc/config/rs6000/7xx.md
+++ b/gcc/config/rs6000/7xx.md
@@ -61,7 +61,7 @@
   "ppc750_du,lsu_7xx")
 
 (define_insn_reservation "ppc750-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
+  (and (eq_attr "type" "integer,insert,shift,\
                         trap,var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc750,ppc7400"))
   "ppc750_du,iu1_7xx|iu2_7xx")

diff --git a/gcc/config/rs6000/8540.md b/gcc/config/rs6000/8540.md
index da3f92b0a23eba06ee62b23bb16ee2e35d10fa28..53545eeb71c70941ddca6791d5b7a3ba10c50b91 100644 (file)
--- a/gcc/config/rs6000/8540.md
+++ b/gcc/config/rs6000/8540.md
@@ -84,7 +84,7 @@
 
 ;; Simple SU insns
 (define_insn_reservation "ppc8540_su" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\
+  (and (eq_attr "type" "integer,insert,cmp,compare,\
                         delayed_compare,var_delayed_compare,fast_compare,\
                         shift,trap,var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppc8540,ppc8548"))

diff --git a/gcc/config/rs6000/cell.md b/gcc/config/rs6000/cell.md
index 8c3c7413da342130658b77a5a7172e5600e0b4d2..3a2668f211ec08f25d70840f3412d85a5d068746 100644 (file)
--- a/gcc/config/rs6000/cell.md
+++ b/gcc/config/rs6000/cell.md
@@ -166,8 +166,10 @@
 
 ;; Integer latency is 2 cycles
 (define_insn_reservation "cell-integer" 2
-  (and (eq_attr "type" "integer,insert_dword,shift,trap,\
-                       var_shift_rotate,cntlz,exts,isel")
+  (and (ior (eq_attr "type" "integer,shift,trap,\
+                            var_shift_rotate,cntlz,exts,isel")
+           (and (eq_attr "type" "insert")
+                (eq_attr "size" "64")))
        (eq_attr "cpu" "cell"))
   "slot01,fxu_cell")
 
@@ -185,7 +187,8 @@
 
 ;; rlwimi, alter cr0  
 (define_insn_reservation "cell-insert" 2
-  (and (eq_attr "type" "insert_word")
+  (and (eq_attr "type" "insert")
+       (eq_attr "size" "32")
        (eq_attr "cpu" "cell"))
  "slot01,fxu_cell")
 

diff --git a/gcc/config/rs6000/e300c2c3.md b/gcc/config/rs6000/e300c2c3.md
index aba0d206e7ce226cba65f535eef2dc3a1a15b9fc..e9c8f18a0c7b7890ac4fd2abdbd74f0e04ce4fa0 100644 (file)
--- a/gcc/config/rs6000/e300c2c3.md
+++ b/gcc/config/rs6000/e300c2c3.md
@@ -90,7 +90,7 @@
 
 ;; Other one cycle IU insns
 (define_insn_reservation "ppce300c3_iu" 1
-  (and (eq_attr "type" "integer,insert_word,isel")
+  (and (eq_attr "type" "integer,insert,isel")
        (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
   "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_retire")
 

diff --git a/gcc/config/rs6000/e500mc.md b/gcc/config/rs6000/e500mc.md
index 051394eaeeb96cf92e394ac3a064243daa0ae36d..426903de79208cbd0a5f10b0745114d324192949 100644 (file)
--- a/gcc/config/rs6000/e500mc.md
+++ b/gcc/config/rs6000/e500mc.md
@@ -70,7 +70,7 @@
 
 ;; Simple SU insns.
 (define_insn_reservation "e500mc_su" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\
+  (and (eq_attr "type" "integer,insert,cmp,compare,\
                         delayed_compare,var_delayed_compare,fast_compare,\
                         shift,trap,var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "ppce500mc"))

diff --git a/gcc/config/rs6000/e500mc64.md b/gcc/config/rs6000/e500mc64.md
index 3fcd94ee6f9b3413fa1e0305009bbaadc1df617e..584aef3ea5627c78c03ae90c3dba9a2848e59922 100644 (file)
--- a/gcc/config/rs6000/e500mc64.md
+++ b/gcc/config/rs6000/e500mc64.md
@@ -69,7 +69,7 @@
 
 ;; Simple SU insns.
 (define_insn_reservation "e500mc64_su" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,delayed_compare,\
+  (and (eq_attr "type" "integer,insert,delayed_compare,\
        shift,cntlz,exts")
        (eq_attr "cpu" "ppce500mc64"))
   "e500mc64_decode,e500mc64_issue+e500mc64_su_stage0+e500mc64_retire")

diff --git a/gcc/config/rs6000/e5500.md b/gcc/config/rs6000/e5500.md
index b04d0a3b75aa56e8baf24bbcfd318aa92697a1e6..fd79ca558514cef5133c664bfc5b7a759dbca147 100644 (file)
--- a/gcc/config/rs6000/e5500.md
+++ b/gcc/config/rs6000/e5500.md
@@ -56,7 +56,7 @@
 
 ;; SFX.
 (define_insn_reservation "e5500_sfx" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,delayed_compare,\
+  (and (eq_attr "type" "integer,insert,delayed_compare,\
        shift,cntlz,exts")
        (eq_attr "cpu" "ppce5500"))
   "e5500_decode,e5500_sfx")

diff --git a/gcc/config/rs6000/e6500.md b/gcc/config/rs6000/e6500.md
index 18a372b73afbd3c6b6b4c95579560290e616270c..b84f7038b18d5bc351f4e8015a12872c6ce13fd1 100644 (file)
--- a/gcc/config/rs6000/e6500.md
+++ b/gcc/config/rs6000/e6500.md
@@ -59,7 +59,7 @@
 
 ;; SFX.
 (define_insn_reservation "e6500_sfx" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,delayed_compare,\
+  (and (eq_attr "type" "integer,insert,delayed_compare,\
        shift,cntlz,exts")
        (eq_attr "cpu" "ppce6500"))
   "e6500_decode,e6500_sfx")

diff --git a/gcc/config/rs6000/mpc.md b/gcc/config/rs6000/mpc.md
index 317d064b0adcc21cf4ea67466f2e859e30642415..c4dff563bec94cfec10e367810ac996ea8db5003 100644 (file)
--- a/gcc/config/rs6000/mpc.md
+++ b/gcc/config/rs6000/mpc.md
@@ -41,7 +41,7 @@
   "lsu_mpc")
 
 (define_insn_reservation "mpccore-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "mpccore"))
   "iu_mpc")

diff --git a/gcc/config/rs6000/power4.md b/gcc/config/rs6000/power4.md
index 2f508510b09bc031dbeaeaf63d4b7a83774d3a4d..f905a0d0db482b86bb136c1e61c24099da45136d 100644 (file)
--- a/gcc/config/rs6000/power4.md
+++ b/gcc/config/rs6000/power4.md
@@ -210,8 +210,10 @@
 
 ; Integer latency is 2 cycles
 (define_insn_reservation "power4-integer" 2
-  (and (eq_attr "type" "integer,insert_dword,shift,trap,\
-                        var_shift_rotate,cntlz,exts,isel")
+  (and (ior (eq_attr "type" "integer,shift,trap,\
+                            var_shift_rotate,cntlz,exts,isel")
+           (and (eq_attr "type" "insert")
+                (eq_attr "size" "64")))
        (eq_attr "cpu" "power4"))
   "iq_power4")
 
@@ -238,7 +240,8 @@
     |(iu1_power4,nothing,iu1_power4,nothing,iu2_power4))")
 
 (define_insn_reservation "power4-insert" 4
-  (and (eq_attr "type" "insert_word")
+  (and (eq_attr "type" "insert")
+       (eq_attr "size" "32")
        (eq_attr "cpu" "power4"))
   "(du1_power4+du2_power4|du2_power4+du3_power4|du3_power4+du4_power4),\
    ((iu1_power4,nothing,iu2_power4)\

diff --git a/gcc/config/rs6000/power5.md b/gcc/config/rs6000/power5.md
index 3b855d3ec688c72eb8db70fa99e00ed1869b0437..407ec71159b403e3f178f0ce40900a3e6fe045d3 100644 (file)
--- a/gcc/config/rs6000/power5.md
+++ b/gcc/config/rs6000/power5.md
@@ -166,8 +166,10 @@
 
 ; Integer latency is 2 cycles
 (define_insn_reservation "power5-integer" 2
-  (and (eq_attr "type" "integer,insert_dword,shift,trap,\
-                        var_shift_rotate,cntlz,exts,isel,popcnt")
+  (and (ior (eq_attr "type" "integer,shift,trap,\
+                           var_shift_rotate,cntlz,exts,isel,popcnt")
+           (and (eq_attr "type" "insert")
+                (eq_attr "size" "64")))
        (eq_attr "cpu" "power5"))
   "iq_power5")
 
@@ -194,7 +196,8 @@
     |(iu1_power5,nothing,iu2_power5,nothing,iu2_power5))")
 
 (define_insn_reservation "power5-insert" 4
-  (and (eq_attr "type" "insert_word")
+  (and (eq_attr "type" "insert")
+       (eq_attr "size" "32")
        (eq_attr "cpu" "power5"))
   "du1_power5+du2_power5,iu1_power5,nothing,iu2_power5")
 

diff --git a/gcc/config/rs6000/power6.md b/gcc/config/rs6000/power6.md
index bed2f9f6f111df4b8ef8d2ec8d709a7e813ec22a..3a77fc52c970d0ddbac78de633c8ad34a0b0df58 100644 (file)
--- a/gcc/config/rs6000/power6.md
+++ b/gcc/config/rs6000/power6.md
@@ -247,12 +247,14 @@
   "FXU_power6")
 
 (define_insn_reservation "power6-insert" 1
-  (and (eq_attr "type" "insert_word")
+  (and (eq_attr "type" "insert")
+       (eq_attr "size" "32")
        (eq_attr "cpu" "power6"))
   "FX2_power6")
 
 (define_insn_reservation "power6-insert-dword" 1
-  (and (eq_attr "type" "insert_dword")
+  (and (eq_attr "type" "insert")
+       (eq_attr "size" "64")
        (eq_attr "cpu" "power6"))
   "FX2_power6")
 

diff --git a/gcc/config/rs6000/power7.md b/gcc/config/rs6000/power7.md
index be92bd5691c596770579af7c69500b610495cf6a..d6ddc2434c6cf5aef2f4f9ae54945096f9f10b36 100644 (file)
--- a/gcc/config/rs6000/power7.md
+++ b/gcc/config/rs6000/power7.md
@@ -174,7 +174,7 @@
 
 ; FX Unit
 (define_insn_reservation "power7-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,exts,isel,popcnt")
        (eq_attr "cpu" "power7"))
   "DU_power7,FXU_power7")

diff --git a/gcc/config/rs6000/power8.md b/gcc/config/rs6000/power8.md
index 024b97235d869e9148aaf606d9ce6ff86971cf9a..f7bd9f86087751a42b9afd6a677d5bbc9d76837f 100644 (file)
--- a/gcc/config/rs6000/power8.md
+++ b/gcc/config/rs6000/power8.md
@@ -168,7 +168,7 @@
 
 ; FX Unit
 (define_insn_reservation "power8-1cyc" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,exts,isel")
        (eq_attr "cpu" "power8"))
   "DU_any_power8,FXU_power8")

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ba8479822c5a0fde226ec25043c9c38d05d91049..c8aba1fbcf3cac2945290f6690796230d18b14c6 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -26240,8 +26240,7 @@ rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
                   case TYPE_FAST_COMPARE:
                   case TYPE_EXTS:
                   case TYPE_SHIFT:
-                  case TYPE_INSERT_WORD:
-                  case TYPE_INSERT_DWORD:
+                  case TYPE_INSERT:
                     {
                       if (! store_data_bypass_p (dep_insn, insn))
                         return 3;
@@ -26311,8 +26310,7 @@ rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
                   case TYPE_FAST_COMPARE:
                   case TYPE_EXTS:
                   case TYPE_SHIFT:
-                  case TYPE_INSERT_WORD:
-                  case TYPE_INSERT_DWORD:
+                  case TYPE_INSERT:
                     {
                       if (set_to_load_agen (dep_insn, insn))
                         return 3;
@@ -26495,7 +26493,8 @@ is_cracked_insn (rtx insn)
          || (type == TYPE_MUL
              && get_attr_dot (insn) == DOT_YES)
          || type == TYPE_IDIV || type == TYPE_LDIV
-         || type == TYPE_INSERT_WORD)
+         || (type == TYPE_INSERT
+             && get_attr_size (insn) == SIZE_32))
        return true;
     }
 
@@ -27320,7 +27319,6 @@ insn_must_be_first_in_group (rtx insn)
 
       switch (type)
         {
-        case TYPE_INSERT_DWORD:
         case TYPE_EXTS:
         case TYPE_CNTLZ:
         case TYPE_SHIFT:
@@ -27328,7 +27326,7 @@ insn_must_be_first_in_group (rtx insn)
         case TYPE_TRAP:
         case TYPE_MUL:
         case TYPE_IDIV:
-        case TYPE_INSERT_WORD:
+        case TYPE_INSERT:
         case TYPE_DELAYED_COMPARE:
         case TYPE_FPCOMPARE:
         case TYPE_MFCR:

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 5993537e280bc8271a7c4b1150ff0def55d99cbf..0150e435a377702c3e1ad28a5aed0506f039d908 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -159,7 +159,7 @@
 ;; computations.
 (define_attr "type"
   "integer,two,three,
-   shift,var_shift_rotate,insert_word,insert_dword,
+   shift,var_shift_rotate,insert,
    mul,halfmul,idiv,ldiv,
    exts,cntlz,popcnt,isel,
    load,store,fpload,fpstore,vecload,vecstore,
@@ -175,7 +175,7 @@
   (const_string "integer"))
 
 ;; What data size does this instruction work on?
-;; This is used for mul.
+;; This is used for insert, mul.
 (define_attr "size" "8,16,32,64" (const_string "32"))
 
 ;; Is this instruction record form ("dot", signed compare to 0, writing CR0)?
@@ -3417,7 +3417,7 @@
   operands[1] = GEN_INT (start + size - 1);
   return \"rlwimi %0,%3,%h4,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 (define_insn "*insvsi_internal1"
   [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
@@ -3436,7 +3436,7 @@
   operands[1] = GEN_INT (start + size - 1);
   return \"rlwimi %0,%3,%h4,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 (define_insn "*insvsi_internal2"
   [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
@@ -3455,7 +3455,7 @@
   operands[1] = GEN_INT (start + size - 1);
   return \"rlwimi %0,%3,%h4,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 (define_insn "*insvsi_internal3"
   [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
@@ -3474,7 +3474,7 @@
   operands[1] = GEN_INT (start + size - 1);
   return \"rlwimi %0,%3,%h4,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 (define_insn "*insvsi_internal4"
   [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
@@ -3496,7 +3496,7 @@
   operands[1] = GEN_INT (insert_start + insert_size - 1);
   return \"rlwimi %0,%3,%h5,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 ;; combine patterns for rlwimi
 (define_insn "*insvsi_internal5"
@@ -3516,7 +3516,7 @@
  operands[1] = GEN_INT(me);
  return \"rlwimi %0,%3,%h4,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 (define_insn "*insvsi_internal6"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
@@ -3535,7 +3535,7 @@
  operands[1] = GEN_INT(me);
  return \"rlwimi %0,%3,%h4,%h2,%h1\";
 }"
-  [(set_attr "type" "insert_word")])
+  [(set_attr "type" "insert")])
 
 (define_insn "insvdi_internal"
   [(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r")
@@ -3551,7 +3551,8 @@
   operands[1] = GEN_INT (64 - start - size);
   return \"rldimi %0,%3,%H1,%H2\";
 }"
-  [(set_attr "type" "insert_dword")])
+  [(set_attr "type" "insert")
+   (set_attr "size" "64")])
 
 (define_insn "*insvdi_internal2"
   [(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r")

diff --git a/gcc/config/rs6000/rs64.md b/gcc/config/rs6000/rs64.md
index 76113e873afc0e63b2cbd5f321f51da27ca3e6b8..aaddb5979d6fd5099d3aa1e128188056675cdb6b 100644 (file)
--- a/gcc/config/rs6000/rs64.md
+++ b/gcc/config/rs6000/rs64.md
@@ -46,7 +46,7 @@
   "lsu_rs64")
 
 (define_insn_reservation "rs64a-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+  (and (eq_attr "type" "integer,insert,shift,trap,\
                         var_shift_rotate,cntlz,exts,isel")
        (eq_attr "cpu" "rs64a"))
   "iu_rs64")

diff --git a/gcc/config/rs6000/titan.md b/gcc/config/rs6000/titan.md
index 21186a3a206cbc5534158f476b0da282e0c5fc18..6c7516d3bb251dafeabc9088961be0864ac868ed 100644 (file)
--- a/gcc/config/rs6000/titan.md
+++ b/gcc/config/rs6000/titan.md
@@ -51,7 +51,7 @@
 (define_bypass 2 "titan_mulhw" "titan_mulhw")
 
 (define_insn_reservation "titan_fxu_shift_and_rotate" 2
-  (and (eq_attr "type" "insert_word,shift,var_shift_rotate,cntlz")
+  (and (eq_attr "type" "insert,shift,var_shift_rotate,cntlz")
        (eq_attr "cpu" "titan"))
   "titan_issue,titan_fxu_sh,nothing*2,titan_fxu_wb")