MIPS: Implement ieee754 NAN2008 emulation mode

Implement ieee754 NAN2008 emulation mode.

When this mode is enabled, kernel will accept ELF file
compiled for both NaN 2008 and NaN legacy, but if hardware
does not have capability to match ELF's NaN mode, __own_fpu
will fail for corresponding thread and fpuemu will then kick
in.

This mode trade performance for correctness, while maintaining
support for both NaN mode regardless of hardware capability.
It is useful for multilib installation that have both types
of binary exist in system.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index b600df82669db000304571fd23c3af90df36190d..c49336b8f03137e8370222d730dfa7277cc05554 100644 (file)
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2022,7 +2022,7 @@
                        for the device. By default it is set to false (0).
 
        ieee754=        [MIPS] Select IEEE Std 754 conformance mode
-                       Format: { strict | legacy | 2008 | relaxed }
+                       Format: { strict | legacy | 2008 | relaxed | emulated }
                        Default: strict
 
                        Choose which programs will be accepted for execution
@@ -2042,6 +2042,8 @@
                                by the FPU
                        relaxed accept any binaries regardless of whether
                                supported by the FPU
+                       emulated accept any binaries but enable FPU emulator
+                               if binary mode is unsupported by the FPU.
 
                        The FPU emulator is always able to support both NaN
                        encodings, so if no FPU hardware is present or it has

diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 86310d6e10352ce7a18dc0cf6761ac7312d75980..bc5ac9887d097646dd8d34ada5810091c073e269 100644 (file)
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -129,6 +129,18 @@ static inline int __own_fpu(void)
        if (ret)
                return ret;
 
+       if (current->thread.fpu.fcr31 & FPU_CSR_NAN2008) {
+               if (!cpu_has_nan_2008) {
+                       ret = SIGFPE;
+                       goto failed;
+               }
+       } else {
+               if (!cpu_has_nan_legacy) {
+                       ret = SIGFPE;
+                       goto failed;
+               }
+       }
+
        KSTK_STATUS(current) |= ST0_CU1;
        if (mode == FPU_64BIT || mode == FPU_HYBRID)
                KSTK_STATUS(current) |= ST0_FR;
@@ -137,6 +149,9 @@ static inline int __own_fpu(void)
 
        set_thread_flag(TIF_USEDFPU);
        return 0;
+failed:
+       __disable_fpu();
+       return ret;
 }
 
 static inline int own_fpu_inatomic(int restore)

diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index 7aa2c2360ff60219bb8fb9f03a8a528edf7f53a1..f0e7fe85a42a7a0d461a674bd8254886dc6a43e8 100644 (file)
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -318,6 +318,10 @@ void mips_set_personality_nan(struct arch_elf_state *state)
        t->thread.fpu.fcr31 = c->fpu_csr31;
        switch (state->nan_2008) {
        case 0:
+               if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
+                       t->thread.fpu.fcr31 &= ~FPU_CSR_NAN2008;
+               if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
+                       t->thread.fpu.fcr31 &= ~FPU_CSR_ABS2008;
                break;
        case 1:
                if (!(c->fpu_msk31 & FPU_CSR_NAN2008))

diff --git a/arch/mips/kernel/fpu-probe.c b/arch/mips/kernel/fpu-probe.c
index e689d6a832342e393709b3e03bd14a3692aa7c68..6bf3f19b1c335d9f861a276dac8bcfe337e1fa51 100644 (file)
--- a/arch/mips/kernel/fpu-probe.c
+++ b/arch/mips/kernel/fpu-probe.c
@@ -144,7 +144,7 @@ static void cpu_set_fpu_2008(struct cpuinfo_mips *c)
  * IEEE 754 conformance mode to use.  Affects the NaN encoding and the
  * ABS.fmt/NEG.fmt execution mode.
  */
-static enum { STRICT, LEGACY, STD2008, RELAXED } ieee754 = STRICT;
+static enum { STRICT, EMULATED, LEGACY, STD2008, RELAXED } ieee754 = STRICT;
 
 /*
  * Set the IEEE 754 NaN encodings and the ABS.fmt/NEG.fmt execution modes
@@ -160,6 +160,7 @@ static void cpu_set_nofpu_2008(struct cpuinfo_mips *c)
 
        switch (ieee754) {
        case STRICT:
+       case EMULATED:
                if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |
                                    MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 |
                                    MIPS_CPU_ISA_M32R5 | MIPS_CPU_ISA_M64R5 |
@@ -204,6 +205,10 @@ static void cpu_set_nan_2008(struct cpuinfo_mips *c)
                mips_use_nan_legacy = !cpu_has_nan_2008;
                mips_use_nan_2008 = !!cpu_has_nan_2008;
                break;
+       case EMULATED:
+               /* Pretend ABS2008/NAN2008 options are dynamic */
+               c->fpu_msk31 &= ~(FPU_CSR_NAN2008 | FPU_CSR_ABS2008);
+               fallthrough;
        case RELAXED:
                mips_use_nan_legacy = true;
                mips_use_nan_2008 = true;
@@ -226,6 +231,8 @@ static int __init ieee754_setup(char *s)
                return -1;
        else if (!strcmp(s, "strict"))
                ieee754 = STRICT;
+       else if (!strcmp(s, "emulated"))
+               ieee754 = EMULATED;
        else if (!strcmp(s, "legacy"))
                ieee754 = LEGACY;
        else if (!strcmp(s, "2008"))