drm/amd/amdgpu: enable sram fgcg on gc 12.0.1

enable sram fgcg on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 2d0b21348d64ad4536bf4a40df6995125c3894be..e5bf2984d8cb234f880be9995e942badf00534fb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3797,7 +3797,20 @@ static void gfx_v12_0_update_repeater_fgcg(struct amdgpu_device *adev,
 static void gfx_v12_0_update_sram_fgcg(struct amdgpu_device *adev,
                                       bool enable)
 {
-       /* TODO */
+       uint32_t def, data;
+
+       if (!(adev->cg_flags & AMD_CG_SUPPORT_GFX_FGCG))
+               return;
+
+       def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);
+
+       if (enable)
+               data &= ~RLC_CGTT_MGCG_OVERRIDE__GFXIP_FGCG_OVERRIDE_MASK;
+       else
+               data |= RLC_CGTT_MGCG_OVERRIDE__GFXIP_FGCG_OVERRIDE_MASK;
+
+       if (def != data)
+               WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);
 }
 
 static int gfx_v12_0_update_gfx_clock_gating(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 701056a865a4c3f4fc4e68b8dbbbe2c7111427ec..174126bc5f602b6346816b265afec024cc74a52a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -407,6 +407,7 @@ static int soc24_common_early_init(void *handle)
                        AMD_CG_SUPPORT_GFX_3D_CGCG |
                        AMD_CG_SUPPORT_GFX_3D_CGLS |
                        AMD_CG_SUPPORT_REPEATER_FGCG |
+                       AMD_CG_SUPPORT_GFX_FGCG |
                        AMD_CG_SUPPORT_GFX_PERF_CLK;
                adev->pg_flags = AMD_PG_SUPPORT_VCN |
                        AMD_PG_SUPPORT_JPEG |