]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: exynos2200: Add default GIC address cells
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sat, 30 Aug 2025 09:39:19 +0000 (11:39 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 31 Aug 2025 10:56:55 +0000 (12:56 +0200)
Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250830093918.24619-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/exynos2200.dtsi

index 933ab7818ab23e316cf572ae8d325a4ef9b566cd..6487ccb58ae7688a2585a1bb843b29ae119a17d9 100644 (file)
                        reg = <0x10200000 0x10000>,     /* GICD */
                              <0x10240000 0x200000>;    /* GICR * 8 */
 
+                       #address-cells = <0>;
                        #interrupt-cells = <4>;
                        interrupt-controller;
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;