drm/vc4: hdmi: Increase audio MAI fifo dreq threshold

Now we wait for write responses and have a burst
size of 4, we can set the fifo threshold much higher.

Set it to 28 (of the 32 entry size) to keep fifo
fuller and reduce chance of underflow.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240621152055.4180873-8-dave.stevenson@raspberrypi.com
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 43f4e150d72678ffbcb4813a87b3517983409437..60cbf1d4c7dd1fa72cda2fad0ac05b1619bf1224 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2047,6 +2047,7 @@ static int vc4_hdmi_audio_prepare(struct device *dev, void *data,
        struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
        struct drm_device *drm = vc4_hdmi->connector.dev;
        struct drm_connector *connector = &vc4_hdmi->connector;
+       struct vc4_dev *vc4 = to_vc4_dev(drm);
        unsigned int sample_rate = params->sample_rate;
        unsigned int channels = params->channels;
        unsigned long flags;
@@ -2104,11 +2105,18 @@ static int vc4_hdmi_audio_prepare(struct device *dev, void *data,
                                             VC4_HDMI_AUDIO_PACKET_CEA_MASK);
 
        /* Set the MAI threshold */
-       HDMI_WRITE(HDMI_MAI_THR,
-                  VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICHIGH) |
-                  VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICLOW) |
-                  VC4_SET_FIELD(0x06, VC4_HD_MAI_THR_DREQHIGH) |
-                  VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_DREQLOW));
+       if (vc4->is_vc5)
+               HDMI_WRITE(HDMI_MAI_THR,
+                          VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
+                          VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
+                          VC4_SET_FIELD(0x1c, VC4_HD_MAI_THR_DREQHIGH) |
+                          VC4_SET_FIELD(0x1c, VC4_HD_MAI_THR_DREQLOW));
+       else
+               HDMI_WRITE(HDMI_MAI_THR,
+                          VC4_SET_FIELD(0x8, VC4_HD_MAI_THR_PANICHIGH) |
+                          VC4_SET_FIELD(0x8, VC4_HD_MAI_THR_PANICLOW) |
+                          VC4_SET_FIELD(0x6, VC4_HD_MAI_THR_DREQHIGH) |
+                          VC4_SET_FIELD(0x8, VC4_HD_MAI_THR_DREQLOW));
 
        HDMI_WRITE(HDMI_MAI_CONFIG,
                   VC4_HDMI_MAI_CONFIG_BIT_REVERSE |