DEF(add, 1, 2, 0, TCG_OPF_INT)
DEF(and, 1, 2, 0, TCG_OPF_INT)
DEF(andc, 1, 2, 0, TCG_OPF_INT)
+DEF(clz, 1, 2, 0, TCG_OPF_INT)
DEF(divs, 1, 2, 0, TCG_OPF_INT)
DEF(divs2, 2, 3, 0, TCG_OPF_INT)
DEF(divu, 1, 2, 0, TCG_OPF_INT)
DEF(bswap16_i32, 1, 1, 1, 0)
DEF(bswap32_i32, 1, 1, 1, 0)
-DEF(clz_i32, 1, 2, 0, 0)
DEF(ctz_i32, 1, 2, 0, 0)
DEF(ctpop_i32, 1, 1, 0, 0)
DEF(bswap16_i64, 1, 1, 1, 0)
DEF(bswap32_i64, 1, 1, 1, 0)
DEF(bswap64_i64, 1, 1, 1, 0)
-DEF(clz_i64, 1, 2, 0, 0)
DEF(ctz_i64, 1, 2, 0, 0)
DEF(ctpop_i64, 1, 1, 0, 0)
void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- if (tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0)) {
- tcg_gen_op3_i32(INDEX_op_clz_i32, ret, arg1, arg2);
- } else if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
+ if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I32, 0)) {
+ tcg_gen_op3_i32(INDEX_op_clz, ret, arg1, arg2);
+ } else if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
TCGv_i64 t1 = tcg_temp_ebb_new_i64();
TCGv_i64 t2 = tcg_temp_ebb_new_i64();
tcg_gen_extu_i32_i64(t1, arg1);
tcg_gen_subi_i32(t, arg1, 1);
tcg_gen_andc_i32(t, t, arg1);
tcg_gen_ctpop_i32(t, t);
- } else if (tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0) ||
- tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
+ } else if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_REG, 0)) {
t = tcg_temp_ebb_new_i32();
tcg_gen_neg_i32(t, arg1);
tcg_gen_and_i32(t, t, arg1);
void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg)
{
- if (tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0) ||
- tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
+ if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_REG, 0)) {
TCGv_i32 t = tcg_temp_ebb_new_i32();
tcg_gen_sari_i32(t, arg, 31);
tcg_gen_xor_i32(t, t, arg);
void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
- tcg_gen_op3_i64(INDEX_op_clz_i64, ret, arg1, arg2);
+ if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
+ tcg_gen_op3_i64(INDEX_op_clz, ret, arg1, arg2);
} else {
gen_helper_clz_i64(ret, arg1, arg2);
}
{
if (TCG_TARGET_REG_BITS == 32
&& arg2 <= 0xffffffffu
- && tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0)) {
+ && tcg_op_supported(INDEX_op_clz, TCG_TYPE_I32, 0)) {
TCGv_i32 t = tcg_temp_ebb_new_i32();
tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32);
tcg_gen_addi_i32(t, t, 32);
tcg_gen_subi_i64(t, arg1, 1);
tcg_gen_andc_i64(t, t, arg1);
tcg_gen_ctpop_i64(t, t);
- } else if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
+ } else if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
t = tcg_temp_ebb_new_i64();
tcg_gen_neg_i64(t, arg1);
tcg_gen_and_i64(t, t, arg1);
void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg)
{
- if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
+ if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
TCGv_i64 t = tcg_temp_ebb_new_i64();
tcg_gen_sari_i64(t, arg, 63);
tcg_gen_xor_i64(t, t, arg);
OUTOP(INDEX_op_add, TCGOutOpBinary, outop_add),
OUTOP(INDEX_op_and, TCGOutOpBinary, outop_and),
OUTOP(INDEX_op_andc, TCGOutOpBinary, outop_andc),
- OUTOP(INDEX_op_clz_i32, TCGOutOpBinary, outop_clz),
- OUTOP(INDEX_op_clz_i64, TCGOutOpBinary, outop_clz),
+ OUTOP(INDEX_op_clz, TCGOutOpBinary, outop_clz),
OUTOP(INDEX_op_divs, TCGOutOpBinary, outop_divs),
OUTOP(INDEX_op_divu, TCGOutOpBinary, outop_divu),
OUTOP(INDEX_op_divs2, TCGOutOpDivRem, outop_divs2),
case INDEX_op_add:
case INDEX_op_and:
case INDEX_op_andc:
- case INDEX_op_clz_i32:
- case INDEX_op_clz_i64:
+ case INDEX_op_clz:
case INDEX_op_divs:
case INDEX_op_divu:
case INDEX_op_eqv: