gas/arm64: don't emit stack pointer symbol table entries

Without this change, all of

	mov	z0.b, p0/m, wsp
	mov	z0.b, wsp
	mov	z0.d, p0/m, sp
	mov	z0.d, sp

insert stray symbols into the symbol table.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0eb8c0daf06bce60f2d1433c72cc7c7c02f8b80d..86876a101a140e7e75197cfd6d7e4dfc573b1b17 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2017-11-13  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-aarch64.c (R_Z_BHSDQ_VZP): Rename to ...
+       (R_Z_SP_BHSDQ_VZP): ... and include both stack pointer variants.
+
 2017-11-13  Jan Beulich  <jbeulich@suse.com>
 
        * testsuite/gas/ia64/group-1.d: Adjust expectations.

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 84b3dc7a84da9a9cc971e659debff42068455b65..87542376cab52dd700de312d384310280e10568a 100644 (file)
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -304,10 +304,11 @@ struct reloc_entry
                 | REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN)       \
                 | REG_TYPE(FP_B) | REG_TYPE(FP_H)                      \
                 | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q))    \
-  /* Typecheck: as above, but also Zn and Pn.  This should only be     \
-     used for SVE instructions, since Zn and Pn are valid symbols      \
+  /* Typecheck: as above, but also Zn, Pn, and {W}SP.  This should only        \
+     be used for SVE instructions, since Zn and Pn are valid symbols   \
      in other contexts.  */                                            \
-  MULTI_REG_TYPE(R_Z_BHSDQ_VZP, REG_TYPE(R_32) | REG_TYPE(R_64)                \
+  MULTI_REG_TYPE(R_Z_SP_BHSDQ_VZP, REG_TYPE(R_32) | REG_TYPE(R_64)     \
+                | REG_TYPE(SP_32) | REG_TYPE(SP_64)                    \
                 | REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN)       \
                 | REG_TYPE(FP_B) | REG_TYPE(FP_H)                      \
                 | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)     \
@@ -415,7 +416,7 @@ get_reg_expected_msg (aarch64_reg_type reg_type)
               "register expected");
       break;
     case REG_TYPE_R_Z_BHSDQ_V:
-    case REG_TYPE_R_Z_BHSDQ_VZP:
+    case REG_TYPE_R_Z_SP_BHSDQ_VZP:
       msg = N_("register expected");
       break;
     case REG_TYPE_BHSDQ:       /* any [BHSDQ]P FP  */
@@ -5269,7 +5270,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
   skip_whitespace (str);
 
   if (AARCH64_CPU_HAS_FEATURE (AARCH64_FEATURE_SVE, *opcode->avariant))
-    imm_reg_type = REG_TYPE_R_Z_BHSDQ_VZP;
+    imm_reg_type = REG_TYPE_R_Z_SP_BHSDQ_VZP;
   else
     imm_reg_type = REG_TYPE_R_Z_BHSDQ_V;