Remove constant vec_select restriction.

The vec_select operator is documented to require a const_int for the lane
selector operand, but GCN has an instruction that can select the lane at
runtime, so it seems reasonable to remove this restriction.

This patch simply replaces assertions that the operand is constant with early
exits from the optimizers.  I think it's reasonable that vec_select with a
non-constant operand cannot be optimized, yet.

Also included is the necessary documentation tweak.

2018-09-19  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* doc/rtl.texi: Adjust vec_select description.
	* simplify-rtx.c (simplify_binary_operation_1): Allow VEC_SELECT to use
	non-constant selectors.

From-SVN: r264423

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 619019d454c9e79f0d2ab2890ab13c6c40e4b739..6ff707401b4fa5abd89db0a3e3a32c63d498eb76 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2018-09-19  Andrew Stubbs  <ams@codesourcery.com>
+
+       * doc/rtl.texi: Adjust vec_select description.
+       * simplify-rtx.c (simplify_binary_operation_1): Allow VEC_SELECT to use
+       non-constant selectors.
+
 2018-09-19  Matthew Malcomson  <matthew.malcomson@arm.com>
 
        * config/aarch64/aarch64-protos.h

diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
index 5b1e69527a53f8f6cdba9947a8b18c024f546769..0695ad2df9b225a49fbde5c25f4c77729f893103 100644 (file)
--- a/gcc/doc/rtl.texi
+++ b/gcc/doc/rtl.texi
@@ -2939,11 +2939,12 @@ a set bit indicates it is taken from @var{vec1}.
 @item (vec_select:@var{m} @var{vec1} @var{selection})
 This describes an operation that selects parts of a vector.  @var{vec1} is
 the source vector, and @var{selection} is a @code{parallel} that contains a
-@code{const_int} for each of the subparts of the result vector, giving the
-number of the source subpart that should be stored into it.
-The result mode @var{m} is either the submode for a single element of
-@var{vec1} (if only one subpart is selected), or another vector mode
-with that element submode (if multiple subparts are selected).
+@code{const_int} (or another expression, if the selection can be made at
+runtime) for each of the subparts of the result vector, giving the number of
+the source subpart that should be stored into it.  The result mode @var{m} is
+either the submode for a single element of @var{vec1} (if only one subpart is
+selected), or another vector mode with that element submode (if multiple
+subparts are selected).
 
 @findex vec_concat
 @item (vec_concat:@var{m} @var{x1} @var{x2})

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index a9f2586d895ae79120503b1e9c3744167adcd735..b4c6883d65de8cf163e9e6a797115d254b238adc 100644 (file)
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -3604,7 +3604,10 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
          gcc_assert (mode == GET_MODE_INNER (GET_MODE (trueop0)));
          gcc_assert (GET_CODE (trueop1) == PARALLEL);
          gcc_assert (XVECLEN (trueop1, 0) == 1);
-         gcc_assert (CONST_INT_P (XVECEXP (trueop1, 0, 0)));
+
+         /* We can't reason about selections made at runtime.  */
+         if (!CONST_INT_P (XVECEXP (trueop1, 0, 0)))
+           return 0;
 
          if (vec_duplicate_p (trueop0, &elt0))
            return elt0;
@@ -3703,7 +3706,9 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
                {
                  rtx x = XVECEXP (trueop1, 0, i);
 
-                 gcc_assert (CONST_INT_P (x));
+                 if (!CONST_INT_P (x))
+                   return 0;
+
                  RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0,
                                                       INTVAL (x));
                }