]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
spi: Merge up v6.8 release
authorMark Brown <broonie@kernel.org>
Mon, 18 Mar 2024 17:30:46 +0000 (17:30 +0000)
committerMark Brown <broonie@kernel.org>
Mon, 18 Mar 2024 17:30:46 +0000 (17:30 +0000)
An i.MX fix depends on other fixes that were sent to v6.8.

1  2 
drivers/spi/spi-cadence-quadspi.c
drivers/spi/spi-cs42l43.c
drivers/spi/spi-ppc4xx.c

index 0df732b03a2d88034d82461862dfecb2b8e71ab0,1a8d03958dffbfb77a4cd183d8a18fbd3ed53d63..350b3dab3a05d148198568a780ed9505916687f9
@@@ -31,9 -31,7 +31,9 @@@
  #include <linux/timer.h>
  
  #define CQSPI_NAME                    "cadence-qspi"
 -#define CQSPI_MAX_CHIPSELECT          16
 +#define CQSPI_MAX_CHIPSELECT          4
 +
 +static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX);
  
  /* Quirks */
  #define CQSPI_NEEDS_WR_DELAY          BIT(0)
@@@ -1412,7 -1410,7 +1412,7 @@@ static int cqspi_mem_process(struct spi
  static int cqspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op)
  {
        int ret;
 -      struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master);
 +      struct cqspi_st *cqspi = spi_controller_get_devdata(mem->spi->controller);
        struct device *dev = &cqspi->pdev->dev;
  
        ret = pm_runtime_resume_and_get(dev);
@@@ -1621,7 -1619,6 +1621,7 @@@ static const struct spi_controller_mem_
  
  static int cqspi_setup_flash(struct cqspi_st *cqspi)
  {
 +      unsigned int max_cs = cqspi->num_chipselect - 1;
        struct platform_device *pdev = cqspi->pdev;
        struct device *dev = &pdev->dev;
        struct device_node *np = dev->of_node;
                        return ret;
                }
  
 -              if (cs >= CQSPI_MAX_CHIPSELECT) {
 +              if (cs >= cqspi->num_chipselect) {
                        dev_err(dev, "Chip select %d out of range.\n", cs);
                        of_node_put(np);
                        return -EINVAL;
 +              } else if (cs < max_cs) {
 +                      max_cs = cs;
                }
  
                f_pdata = &cqspi->f_pdata[cs];
                }
        }
  
 +      cqspi->num_chipselect = max_cs + 1;
        return 0;
  }
  
@@@ -1718,9 -1712,10 +1718,9 @@@ static int cqspi_probe(struct platform_
        int irq;
  
        host = devm_spi_alloc_host(&pdev->dev, sizeof(*cqspi));
 -      if (!host) {
 -              dev_err(&pdev->dev, "devm_spi_alloc_host failed\n");
 +      if (!host)
                return -ENOMEM;
 -      }
 +
        host->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL;
        host->mem_ops = &cqspi_mem_ops;
        host->mem_caps = &cqspi_mem_caps;
        cqspi->current_cs = -1;
        cqspi->sclk = 0;
  
 -      host->num_chipselect = cqspi->num_chipselect;
 -
        ret = cqspi_setup_flash(cqspi);
        if (ret) {
                dev_err(dev, "failed to setup flash parameters %d\n", ret);
                goto probe_setup_failed;
        }
  
 +      host->num_chipselect = cqspi->num_chipselect;
 +
        if (cqspi->use_direct_mode) {
                ret = cqspi_request_mmap_dma(cqspi);
                if (ret == -EPROBE_DEFER)
@@@ -1932,24 -1927,18 +1932,18 @@@ static void cqspi_remove(struct platfor
        pm_runtime_disable(&pdev->dev);
  }
  
- static int cqspi_suspend(struct device *dev)
+ static int cqspi_runtime_suspend(struct device *dev)
  {
        struct cqspi_st *cqspi = dev_get_drvdata(dev);
-       struct spi_controller *host = dev_get_drvdata(dev);
-       int ret;
  
-       ret = spi_controller_suspend(host);
        cqspi_controller_enable(cqspi, 0);
        clk_disable_unprepare(cqspi->clk);
-       return ret;
+       return 0;
  }
  
- static int cqspi_resume(struct device *dev)
+ static int cqspi_runtime_resume(struct device *dev)
  {
        struct cqspi_st *cqspi = dev_get_drvdata(dev);
-       struct spi_controller *host = dev_get_drvdata(dev);
  
        clk_prepare_enable(cqspi->clk);
        cqspi_wait_idle(cqspi);
  
        cqspi->current_cs = -1;
        cqspi->sclk = 0;
+       return 0;
+ }
+ static int cqspi_suspend(struct device *dev)
+ {
+       struct cqspi_st *cqspi = dev_get_drvdata(dev);
+       return spi_controller_suspend(cqspi->host);
+ }
  
-       return spi_controller_resume(host);
+ static int cqspi_resume(struct device *dev)
+ {
+       struct cqspi_st *cqspi = dev_get_drvdata(dev);
+       return spi_controller_resume(cqspi->host);
  }
  
- static DEFINE_RUNTIME_DEV_PM_OPS(cqspi_dev_pm_ops, cqspi_suspend,
-                                cqspi_resume, NULL);
+ static const struct dev_pm_ops cqspi_dev_pm_ops = {
+       RUNTIME_PM_OPS(cqspi_runtime_suspend, cqspi_runtime_resume, NULL)
+       SYSTEM_SLEEP_PM_OPS(cqspi_suspend, cqspi_resume)
+ };
  
  static const struct cqspi_driver_platdata cdns_qspi = {
        .quirks = CQSPI_DISABLE_DAC_MODE,
index d45d9e2e1611623e3b516e91f55e3b0150d21276,adf19e8c4c8a0d1ef9ede14374e8ab6638073a82..27c995b657f2c66b58efcf8a24103e419c9cb71f
@@@ -148,8 -148,7 +148,7 @@@ static void cs42l43_set_cs(struct spi_d
  {
        struct cs42l43_spi *priv = spi_controller_get_devdata(spi->controller);
  
-       if (spi_get_chipselect(spi, 0) == 0)
-               regmap_write(priv->regmap, CS42L43_SPI_CONFIG2, !is_high);
+       regmap_write(priv->regmap, CS42L43_SPI_CONFIG2, !is_high);
  }
  
  static int cs42l43_prepare_message(struct spi_controller *ctlr, struct spi_message *msg)
@@@ -202,11 -201,6 +201,11 @@@ static size_t cs42l43_spi_max_length(st
        return CS42L43_SPI_MAX_LENGTH;
  }
  
 +static void cs42l43_release_of_node(void *data)
 +{
 +      fwnode_handle_put(data);
 +}
 +
  static int cs42l43_spi_probe(struct platform_device *pdev)
  {
        struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent);
        priv->ctlr->transfer_one = cs42l43_transfer_one;
        priv->ctlr->set_cs = cs42l43_set_cs;
        priv->ctlr->max_transfer_size = cs42l43_spi_max_length;
 -
 -      if (is_of_node(fwnode))
 -              fwnode = fwnode_get_named_child_node(fwnode, "spi");
 -
 -      device_set_node(&priv->ctlr->dev, fwnode);
 -
        priv->ctlr->mode_bits = SPI_3WIRE | SPI_MODE_X_MASK;
        priv->ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX;
        priv->ctlr->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
        regmap_write(priv->regmap, CS42L43_SPI_CONFIG3, 0);
        regmap_write(priv->regmap, CS42L43_SPI_CONFIG4, CS42L43_SPI_STALL_ENA_MASK);
  
 +      if (is_of_node(fwnode)) {
 +              fwnode = fwnode_get_named_child_node(fwnode, "spi");
 +              ret = devm_add_action(priv->dev, cs42l43_release_of_node, fwnode);
 +              if (ret) {
 +                      fwnode_handle_put(fwnode);
 +                      return ret;
 +              }
 +      }
 +
 +      device_set_node(&priv->ctlr->dev, fwnode);
 +
        ret = devm_spi_register_controller(priv->dev, priv->ctlr);
        if (ret) {
                dev_err(priv->dev, "Failed to register SPI controller: %d\n", ret);
diff --combined drivers/spi/spi-ppc4xx.c
index b07bb5e5811ec82bf75ec59d64b99d89e0105874,82d6264841fc7f090a5541235569e40023330483..942c3117ab3a904de67c59e7e13e5d40995dd00a
  #include <linux/slab.h>
  #include <linux/errno.h>
  #include <linux/wait.h>
+ #include <linux/platform_device.h>
  #include <linux/of_address.h>
  #include <linux/of_irq.h>
  #include <linux/of_platform.h>
  #include <linux/interrupt.h>
  #include <linux/delay.h>
+ #include <linux/platform_device.h>
  
  #include <linux/spi/spi.h>
  #include <linux/spi/spi_bitbang.h>
@@@ -166,10 -168,8 +168,8 @@@ static int spi_ppc4xx_setupxfer(struct 
        int scr;
        u8 cdm = 0;
        u32 speed;
-       u8 bits_per_word;
  
        /* Start with the generic configuration for this device. */
-       bits_per_word = spi->bits_per_word;
        speed = spi->max_speed_hz;
  
        /*
         * the transfer to overwrite the generic configuration with zeros.
         */
        if (t) {
-               if (t->bits_per_word)
-                       bits_per_word = t->bits_per_word;
                if (t->speed_hz)
                        speed = min(t->speed_hz, spi->max_speed_hz);
        }
@@@ -362,22 -359,22 +359,22 @@@ static int spi_ppc4xx_of_probe(struct p
  
        /* Setup the state for the bitbang driver */
        bbp = &hw->bitbang;
 -      bbp->master = hw->host;
 +      bbp->ctlr = hw->host;
        bbp->setup_transfer = spi_ppc4xx_setupxfer;
        bbp->txrx_bufs = spi_ppc4xx_txrx;
        bbp->use_dma = 0;
 -      bbp->master->setup = spi_ppc4xx_setup;
 -      bbp->master->cleanup = spi_ppc4xx_cleanup;
 -      bbp->master->bits_per_word_mask = SPI_BPW_MASK(8);
 -      bbp->master->use_gpio_descriptors = true;
 +      bbp->ctlr->setup = spi_ppc4xx_setup;
 +      bbp->ctlr->cleanup = spi_ppc4xx_cleanup;
 +      bbp->ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
 +      bbp->ctlr->use_gpio_descriptors = true;
        /*
         * The SPI core will count the number of GPIO descriptors to figure
         * out the number of chip selects available on the platform.
         */
 -      bbp->master->num_chipselect = 0;
 +      bbp->ctlr->num_chipselect = 0;
  
        /* the spi->mode bits understood by this driver: */
 -      bbp->master->mode_bits =
 +      bbp->ctlr->mode_bits =
                SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST;
  
        /* Get the clock for the OPB */