mmc: msm_sdhci: Reset clocks before reconfiguration

U-Boot has to reconfigure the clocks that were set in the boot
loaders. However, in IPQ9574, the clocks have to be reset before
they can be reconfigured. Hence add code to do the relevant
resets.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-7-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>

diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 27bb7052fca6b66a0722d006903045d3b0af4431..ac77fb06bf78a4196b4029d3a717a93711d056a2 100644 (file)
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -10,6 +10,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <malloc.h>
+#include <reset.h>
 #include <sdhci.h>
 #include <wait_bit.h>
 #include <asm/global_data.h>
@@ -153,9 +154,18 @@ static int msm_sdc_probe(struct udevice *dev)
        const struct msm_sdhc_variant_info *var_info;
        struct sdhci_host *host = &prv->host;
        u32 core_version, core_minor, core_major;
+       struct reset_ctl bcr_rst;
        u32 caps;
        int ret;
 
+       ret = reset_get_by_index(dev, 0, &bcr_rst);
+       if (!ret) {
+               reset_assert(&bcr_rst);
+               udelay(200);
+               reset_deassert(&bcr_rst);
+               udelay(200);
+       }
+
        host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
 
        host->max_clk = 0;