]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amdgpu: Add wrapper function for dpc state
authorLijo Lazar <lijo.lazar@amd.com>
Thu, 24 Jul 2025 07:22:56 +0000 (12:52 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 4 Aug 2025 18:42:21 +0000 (14:42 -0400)
Use wrapper functions to set/indicate dpc status.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Ce Sun <cesun102@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h

index 5949cc747c9fb85b3773046588bd288af6ea499d..7c7eecdd68d258589026f1616839e7317630fb3e 100644 (file)
@@ -5699,7 +5699,7 @@ int amdgpu_device_link_reset(struct amdgpu_device *adev)
 
        dev_info(adev->dev, "GPU link reset\n");
 
-       if (!adev->pcie_reset_ctx.occurs_dpc)
+       if (!amdgpu_reset_in_dpc(adev))
                ret = amdgpu_dpm_link_reset(adev);
 
        if (ret)
@@ -6150,7 +6150,7 @@ static void amdgpu_device_recovery_prepare(struct amdgpu_device *adev,
                        list_add_tail(&tmp_adev->reset_list, device_list);
                        if (adev->shutdown)
                                tmp_adev->shutdown = true;
-                       if (adev->pcie_reset_ctx.occurs_dpc)
+                       if (amdgpu_reset_in_dpc(adev))
                                tmp_adev->pcie_reset_ctx.in_link_reset = true;
                }
                if (!list_is_first(&adev->reset_list, device_list))
@@ -6226,9 +6226,8 @@ static void amdgpu_device_halt_activities(struct amdgpu_device *adev,
                drm_client_dev_suspend(adev_to_drm(tmp_adev), false);
 
                /* disable ras on ALL IPs */
-               if (!need_emergency_restart &&
-                     (!adev->pcie_reset_ctx.occurs_dpc) &&
-                     amdgpu_device_ip_need_full_reset(tmp_adev))
+               if (!need_emergency_restart && !amdgpu_reset_in_dpc(adev) &&
+                   amdgpu_device_ip_need_full_reset(tmp_adev))
                        amdgpu_ras_suspend(tmp_adev);
 
                for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
@@ -6256,10 +6255,10 @@ static int amdgpu_device_asic_reset(struct amdgpu_device *adev,
 
 retry: /* Rest of adevs pre asic reset from XGMI hive. */
        list_for_each_entry(tmp_adev, device_list, reset_list) {
-               if (adev->pcie_reset_ctx.occurs_dpc)
+               if (amdgpu_reset_in_dpc(adev))
                        tmp_adev->no_hw_access = true;
                r = amdgpu_device_pre_asic_reset(tmp_adev, reset_context);
-               if (adev->pcie_reset_ctx.occurs_dpc)
+               if (amdgpu_reset_in_dpc(adev))
                        tmp_adev->no_hw_access = false;
                /*TODO Should we stop ?*/
                if (r) {
@@ -6901,7 +6900,7 @@ pci_ers_result_t amdgpu_pci_error_detected(struct pci_dev *pdev, pci_channel_sta
 
                if (hive)
                        mutex_lock(&hive->hive_lock);
-               adev->pcie_reset_ctx.occurs_dpc = true;
+               amdgpu_reset_set_dpc_status(adev, true);
                memset(&reset_context, 0, sizeof(reset_context));
                INIT_LIST_HEAD(&device_list);
 
@@ -7064,7 +7063,7 @@ void amdgpu_pci_resume(struct pci_dev *pdev)
        amdgpu_device_sched_resume(&device_list, NULL, NULL);
        amdgpu_device_gpu_resume(adev, &device_list, false);
        amdgpu_device_recovery_put_reset_lock(adev, &device_list);
-       adev->pcie_reset_ctx.occurs_dpc = false;
+       amdgpu_reset_set_dpc_status(adev, false);
 
        if (hive) {
                mutex_unlock(&hive->hive_lock);
index 4d9b9701139be520c2cfcc94bf6b1a182130959a..3a806953338fdbe3a8c30d730f75313643f308c0 100644 (file)
@@ -160,4 +160,15 @@ int amdgpu_reset_do_xgmi_reset_on_init(
 
 bool amdgpu_reset_in_recovery(struct amdgpu_device *adev);
 
+static inline void amdgpu_reset_set_dpc_status(struct amdgpu_device *adev,
+                                              bool status)
+{
+       adev->pcie_reset_ctx.occurs_dpc = status;
+}
+
+static inline bool amdgpu_reset_in_dpc(struct amdgpu_device *adev)
+{
+       return adev->pcie_reset_ctx.occurs_dpc;
+}
+
 #endif