* Author: Sam.Shih <sam.shih@mediatek.com>
*/
-#include "mt7986a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
+#include "mt7986a.dtsi"
+
/ {
aliases {
serial0 = &uart0;
reg = <0>;
phy-mode = "2500base-x";
+ nvmem-cells = <&macaddr_factory_2a 0>;
+ nvmem-cell-names = "mac-address";
+
fixed-link {
speed = <2500>;
full-duplex;
reg = <1>;
phy-mode = "2500base-x";
phy = <&phy6>;
+
+ nvmem-cells = <&macaddr_factory_24 0>;
+ nvmem-cell-names = "mac-address";
};
mdio: mdio-bus {
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
+ nvmem-cells = <&eeprom_factory>;
+ nvmem-cell-names = "eeprom";
};
&crypto {
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
- "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
- "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
- "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
- "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
- "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
- "WF1_TOP_CLK", "WF1_TOP_DATA";
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
- "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
- "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
- "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
- "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
- "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
- "WF1_TOP_CLK", "WF1_TOP_DATA";
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
*/
/dts-v1/;
-#include "mt7986a.dtsi"
#include "mt7986a-zyxel-ex5601-t0-common.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
/ {
model = "Zyxel EX5601-T0 (stock layout)";
compatible = "zyxel,ex5601-t0-stock", "mediatek,mt7986a";
-
- memory@40000000 {
- device_type = "memory";
- reg = <0 0x40000000 0 0x20000000>;
- };
};
&spi_nand {
partition@0 {
label = "BL2";
- reg = <0x00000 0x0100000>;
+ reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
- reg = <0x0100000 0x0080000>;
+ reg = <0x100000 0x80000>;
};
factory: partition@180000 {
label = "Factory";
- reg = <0x180000 0x0200000>;
+ reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
reg = <0x0 0x1000>;
};
- macaddr_factory_0004: macaddr@4 {
+ macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
- reg = <0x0004 0x6>;
+ reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
- macaddr_factory_0024: macaddr@24 {
+ macaddr_factory_24: macaddr@24 {
compatible = "mac-base";
- reg = <0x0024 0x6>;
+ reg = <0x24 0x6>;
#nvmem-cell-cells = <1>;
};
- macaddr_factory_002a: macaddr@2a {
+ macaddr_factory_2a: macaddr@2a {
compatible = "mac-base";
- reg = <0x002a 0x6>;
+ reg = <0x2a 0x6>;
#nvmem-cell-cells = <1>;
};
};
partition@380000 {
label = "FIP";
- reg = <0x380000 0x01C0000>;
+ reg = <0x380000 0x1c0000>;
read-only;
};
partition@540000 {
label = "zloader";
- reg = <0x540000 0x0040000>;
+ reg = <0x540000 0x40000>;
read-only;
};
partition@8580000 {
label = "zyubi";
- reg = <0x8580000 0x15A80000>;
+ reg = <0x8580000 0x15a80000>;
};
};
-
-&gmac0 {
- nvmem-cells = <&macaddr_factory_002a 0>;
- nvmem-cell-names = "mac-address";
-};
-
-&gmac1 {
- nvmem-cells = <&macaddr_factory_0024 0>;
- nvmem-cell-names = "mac-address";
-};
-
-&wifi {
- nvmem-cells = <&eeprom_factory>;
- nvmem-cell-names = "eeprom";
-};
*/
/dts-v1/;
-#include "mt7986a.dtsi"
#include "mt7986a-zyxel-ex5601-t0-common.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
/ {
model = "Zyxel EX5601-T0 ubootmod";
compatible = "zyxel,ex5601-t0-ubootmod", "mediatek,mt7986a";
- memory@40000000 {
- device_type = "memory";
- reg = <0 0x40000000 0 0x20000000>;
- };
-
chosen {
bootargs-append = " root=/dev/fit0 rootwait";
rootdisk = <&ubi_rootdisk>;
partition@100000 {
label = "u-boot-env";
- reg = <0x0100000 0x0080000>;
+ reg = <0x100000 0x80000>;
read-only;
};
factory: partition@180000 {
- label = "Factory";
- reg = <0x180000 0x0200000>;
+ label = "factory";
+ reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
reg = <0x0 0x1000>;
};
- macaddr_factory_0004: macaddr@4 {
+ macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
- reg = <0x0004 0x6>;
+ reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
- macaddr_factory_0024: macaddr@24 {
+ macaddr_factory_24: macaddr@24 {
compatible = "mac-base";
- reg = <0x0024 0x6>;
+ reg = <0x24 0x6>;
#nvmem-cell-cells = <1>;
};
- macaddr_factory_002a: macaddr@2a {
+ macaddr_factory_2a: macaddr@2a {
compatible = "mac-base";
- reg = <0x002a 0x6>;
+ reg = <0x2a 0x6>;
#nvmem-cell-cells = <1>;
};
};
partition@380000 {
label = "fip";
- reg = <0x380000 0x01c0000>;
+ reg = <0x380000 0x1c0000>;
read-only;
};
partition@540000 {
label = "zloader";
- reg = <0x540000 0x0040000>;
+ reg = <0x540000 0x40000>;
read-only;
};
};
};
};
-
-&gmac0 {
- nvmem-cells = <&macaddr_factory_002a 0>;
- nvmem-cell-names = "mac-address";
-};
-
-&gmac1 {
- nvmem-cells = <&macaddr_factory_0024 0>;
- nvmem-cell-names = "mac-address";
-};
-
-&wifi {
- nvmem-cells = <&eeprom_factory>;
- nvmem-cell-names = "eeprom";
-};